Re: RFA: Fix debug info for MIPS doubles

[Daniel Jacobowitz <drow at false dot org>]

On Wed, Oct 17, 2007 at 11:41:28AM -0400, Daniel Jacobowitz wrote:
> Your changes seem reasonable to me; I'm running tests now (along with
> the alternate FAKE_CALL_REGNO change).

I have checked in this version, which still causes no regressions and
fixes store.exp.  Thanks for the help.

The modified version of your FAKE_CALL_REGNO patch from yesterday also
showed no problems.

-- 
Daniel Jacobowitz
CodeSourcery

2007-10-18  Daniel Jacobowitz  <dan@codesourcery.com>

	* config/mips/mips.c (mips_dwarf_register_span): New.
	(TARGET_DWARF_REGISTER_SPAN): Define.

Index: config/mips/mips.c
===================================================================
--- config/mips/mips.c	(revision 129437)
+++ config/mips/mips.c	(working copy)
@@ -432,6 +432,7 @@ static void mips_set_current_function (t
 static int mips_mode_rep_extended (enum machine_mode, enum machine_mode);
 static bool mips_offset_within_alignment_p (rtx, HOST_WIDE_INT);
 static void mips_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
+static rtx mips_dwarf_register_span (rtx);
 
 /* Structure to be filled in by compute_frame_size with register
    save masks, and offsets for the current function.  */
@@ -1386,6 +1387,9 @@ static const unsigned char mips16e_save_
 #define TARGET_ASM_OUTPUT_DWARF_DTPREL mips_output_dwarf_dtprel
 #endif
 
+#undef TARGET_DWARF_REGISTER_SPAN
+#define TARGET_DWARF_REGISTER_SPAN mips_dwarf_register_span
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 
@@ -12866,5 +12870,31 @@ mips_output_dwarf_dtprel (FILE *file, in
   output_addr_const (file, x);
   fputs ("+0x8000", file);
 }
+
+/* Implement TARGET_DWARF_REGISTER_SPAN.  */
+
+static rtx
+mips_dwarf_register_span (rtx reg)
+{
+  rtx high, low;
+  enum machine_mode mode;
+
+  /* By default, GCC maps increasing register numbers to increasing
+     memory locations, but paired FPRs are always little-endian,
+     regardless of the prevailing endianness.  */
+  mode = GET_MODE (reg);
+  if (FP_REG_P (REGNO (reg))
+      && TARGET_BIG_ENDIAN
+      && MAX_FPRS_PER_FMT > 1
+      && GET_MODE_SIZE (mode) > UNITS_PER_FPREG)
+    {
+      gcc_assert (GET_MODE_SIZE (mode) == UNITS_PER_HWFPVALUE);
+      high = mips_subword (reg, true);
+      low = mips_subword (reg, false);
+      return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, high, low));
+    }
+
+  return NULL_RTX;
+}
 
 #include "gt-mips.h"