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[Patch] MIPS: Optimize sync_compare_and_swap for const zero.
- From: David Daney <ddaney at avtrex dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard Sandiford <rsandifo at nildram dot co dot uk>
- Date: Tue, 02 Oct 2007 11:19:17 -0700
- Subject: [Patch] MIPS: Optimize sync_compare_and_swap for const zero.
This patch fixes a missed optimization problem with the
sync_compare_and_swap insns I recently added.
For a constant zero compare value we can directly compare against $0,
instead of loading zero into a register for the compare. This typically
saves one instruction and reduces register usage.
Tested on mipsel-linux-gnu with bootstrap of all default languages
yielding no regressions.
OK to commit?
2007-10-02 David Daney <ddaney@avtrex.com>
* config/mips/mips.md (sync_compare_and_swap<mode>): Handle compare
against constant zero.
* config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Handle constant zero
operand.
Index: gcc/config/mips/mips.md
===================================================================
--- gcc/config/mips/mips.md (revision 128829)
+++ gcc/config/mips/mips.md (working copy)
@@ -4331,7 +4331,7 @@ (define_insn "sync_compare_and_swap<mode
[(set (match_operand:GPR 0 "register_operand" "=&d,&d")
(match_operand:GPR 1 "memory_operand" "+R,R"))
(set (match_dup 1)
- (unspec_volatile:GPR [(match_operand:GPR 2 "register_operand" "d,d")
+ (unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_0_operand" "Jd,Jd")
(match_operand:GPR 3 "arith_operand" "I,d")]
UNSPEC_COMPARE_AND_SWAP))]
"GENERATE_LL_SC"
Index: gcc/config/mips/mips.h
===================================================================
--- gcc/config/mips/mips.h (revision 128829)
+++ gcc/config/mips/mips.h (working copy)
@@ -2950,7 +2950,7 @@ while (0)
#define MIPS_COMPARE_AND_SWAP(SUFFIX, OP) \
"%(%<%[%|sync\n" \
"1:\tll" SUFFIX "\t%0,%1\n" \
- "\tbne\t%0,%2,2f\n" \
+ "\tbne\t%0,%z2,2f\n" \
"\t" OP "\t%@,%3\n" \
"\tsc" SUFFIX "\t%@,%1\n" \
"\tbeq\t%@,%.,1b\n" \