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Re: [RFC] try to generate FP and/or/xor instructions for SSE
- From: tbp <tbptbp at gmail dot com>
- To: "Paolo Bonzini" <bonzini at gnu dot org>
- Cc: "Ross Ridge" <rridge at csclub dot uwaterloo dot ca>, "GCC Patches" <gcc-patches at gcc dot gnu dot org>, "Uros Bizjak" <ubizjak at gmail dot com>
- Date: Thu, 23 Aug 2007 16:09:13 +0200
- Subject: Re: [RFC] try to generate FP and/or/xor instructions for SSE
- References: <20070823013503.426FE74B95@caffeine.csclub.uwaterloo.ca> <46CD273E.6060009@gnu.org> <46CD705E.90701@gmail.com> <46CD72E0.3000005@lu.unisi.ch> <46CD7ACA.8050904@gmail.com> <46CD8E69.4060402@gnu.org>
On 8/23/07, Paolo Bonzini <bonzini@gnu.org> wrote:
> This patch tries to prefer ps/pd variants if at least one argument is a
> vector float or vector double or __float128 respectively. I'm not sure
> it is the right design, as it may be a little too aggressive.
>From the description that's perfect, but i'm biased and i suppose
someone more interested in integer SIMD could have some objections :)
I'll hijack that discussion and ask if there's some reason to
misrepresent those builtins
v4si __builtin_ia32_cmpeqps (v4sf, v4sf)
v4si __builtin_ia32_cmpltps (v4sf, v4sf)
v4si __builtin_ia32_cmpleps (v4sf, v4sf)
v4si __builtin_ia32_cmpgtps (v4sf, v4sf)
v4si __builtin_ia32_cmpgeps (v4sf, v4sf)
...etc...
as returning a v4si?