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> k8: > > long2vector: > .LFB3: > movq %rdi, -8(%rsp) > movq -8(%rsp), %xmm0 > ret > > core2: > > long2vector: > .LFB3: > movq %rdi, %xmm0 > ret
Nice. However > +(define_insn "*vec_concatv2di_rex" > + [(set (match_operand:V2DI 0 "register_operand" "=Yt,Yi,!Yt,Yt,x,x,x") > + (vec_concat:V2DI > + (match_operand:DI 1 "nonimmediate_operand" " m,r ,*y ,0 ,0,0,m") > + (match_operand:DI 2 "vector_move_operand" " C,C ,C ,Yt,x,m,0")))]
It seems to me that for NO_INTER_UNIT_MOVES you need the variant of this pattern with second alternative skipped. Otherwise we will end up preferencing the register in some cases. I wonder how the INTER_UNIT_MOVES affected your testcase above?
(define_register_constraint "Yi" "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS" "@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
So, in case of !TARGET_INTER_UNIT_MOVES, second alternative is effectively disabled, and different code is genereated, as confirmed by above asm dumps (k8 vs core2 dumps).
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