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Re: ping: back end reinitialization hooks to support mixed mips16/nomips16 compilation in same file
On 7/9/07, Mark Mitchell <firstname.lastname@example.org> wrote:
Richard Guenther wrote:
> On 7/8/07, Sandra Loosemore <email@example.com> wrote:
>> Anyone had a chance to look over these patches yet? Even some general
>> or discussion about whether this is a good idea would be appreciated.
> What's the advantage of controlling the target per function instead of per
> compilation unit? You can trivially split the compilation unit into a
> per function one...
One advantage is just simplicity for the programmer. It allows
programmers to group functions in a logical way, by functionality,
rather than by what ISA they use. This feature allows users to avoid
making functions non-static just because they happen to be in a
Ok, I see for CPUs that allow different ISAs in one program this might be
Another advantage is better code-generation. There are optimizations
that GCC can do if two functions are in the same translation unit that
are not otherwise possible. LTO will hopefully eliminate many of those
issues, but it's not going to be here soon, and it will always have a
cost. Inlining is the obvious one, but PC-relative calls, using short
branch instructions, is another. Automatically determining that a
function is pure or const, and applying CSE is another example.
Of course optimization between these different ISAs is only possible
if you can mix them - that is, if you don't have the situation with the
Cell "host" ppc and the spus.
So, I think the target-independent part of the patch is OK, but please
wait at least 72 hours to allow for objections. If there are some, then
we'll need to work through the issues. The MIPS changes should be
reviewed by a MIPS maintainer.
Please specify where you bootstrapped and tested this patch on and make
sure you also cover a non-mips primary target.