This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[patch] libstdc++-v3/config/cpu/m68k/atomicity.h: Update.
- From: Kazu Hirata <kazu at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: libstdc++ at gcc dot gnu dot org
- Cc: law at redhat dot com, schwab at suse dot de, nathan at codesourcery dot com
- Date: Fri, 15 Jun 2007 08:14:00 -0700
- Subject: [patch] libstdc++-v3/config/cpu/m68k/atomicity.h: Update.
Hi,
Attached is a patch to use modern and more precise macros instead of
obsolete cpu #defines.
Without this patch, __exchange_and_add uses bset with immediate
addressing on m5445x even though the chip does not support the
instruction. With this patch, ISAC chips like m5445x uses the second
alternative -- the tas instruction.
Tested by building m68k port with other isac patches I've posted
today. OK to apply?
Kazu Hirata
2007-06-15 Nathan Sidwell <nathan@codesourcery.com>
* config/cpu/m68k/atomicity.h: Use __mcfisaa__, __mcfisaaplus__,
__mcfisab__ & __mcfisac__ instead of obsolete cpu #defines.
Index: libstdc++-v3/config/cpu/m68k/atomicity.h
===================================================================
--- libstdc++-v3/config/cpu/m68k/atomicity.h (revision 125740)
+++ libstdc++-v3/config/cpu/m68k/atomicity.h (working copy)
@@ -89,14 +89,14 @@ _GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx)
_Atomic_word __result;
// bset with no immediate addressing (not SMP-safe)
-#if defined(__mcf5200__) || defined(__mcf5300__)
+#if defined(__mcfisaa__) || defined(__mcfisaaplus__)
__asm__ __volatile__("1: bset.b #7,%0@\n\tjbne 1b"
: /* no outputs */
: "a"(&_Atomicity_lock<0>::_S_atomicity_lock)
: "cc", "memory");
- // CPU32 and MCF5400 support test-and-set (SMP-safe).
-#elif defined(__mcpu32__) || defined(__mcf5400__)
+ // CPU32 and CF ISAs B & C support test-and-set (SMP-safe).
+#elif defined(__mcpu32__) || defined(__mcfisab__) || defined (__mcfisac__)
__asm__ __volatile__("1: tas %0\n\tjbne 1b"
: "+m"(_Atomicity_lock<0>::_S_atomicity_lock)
: /* none */