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Re: x86 patch: SSE-based FP<=>int conversions, round 3
- From: "Uros Bizjak" <ubizjak at gmail dot com>
- To: "GCC Patches" <gcc-patches at gcc dot gnu dot org>
- Cc: "Stuart Hastings" <stuart at apple dot com>, "Jan Hubicka" <jh at suse dot cz>
- Date: Wed, 31 Jan 2007 16:38:42 +0100
- Subject: Re: x86 patch: SSE-based FP<=>int conversions, round 3
Hello Stuart!
2006-12-21 Stuart Hastings <stuart@apple.com>
* gcc/config/i386/sse.md (movdi_to_sse): New.
+(define_insn_and_split "movdi_to_sse"
+ [(parallel
+ [(set (match_operand:V4SI 0 "register_operand" "=x")
+ (subreg:V4SI (match_operand:DI 1 "register_operand" "r") 0))
+ (clobber (match_scratch:V4SI 2 "=&x"))])]
+ "!TARGET_64BIT && TARGET_SSE && TARGET_INTER_UNIT_MOVES"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ switch (which_alternative)
+ {
+ case 0:
+ /* The DImode arrived in a pair of integral registers
+ (e.g. %edx:%eax). Assemble the 64-bit DImode value in an xmm
+ register. */
+ emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
+ gen_rtx_SUBREG (SImode, operands[1], 0)));
+ emit_insn (gen_sse2_loadld (operands[2], CONST0_RTX (V4SImode),
+ gen_rtx_SUBREG (SImode, operands[1], 4)));
+ emit_insn (gen_sse2_punpckldq (operands[0], operands[0], operands[2]));
+ break;
+ case 1:
+ emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
+ operands[1]));
+ }
+ DONE;
+})
+
You have only one alternative in the above pattern.
Other than that, I'd rather wait for Jan to approve SSE stuff, as he
is more experienced in this area.
Thanks,
Uros.