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Remove some TARGET_E500 checks
- From: "Joseph S. Myers" <joseph at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 21 Dec 2006 17:59:55 +0000 (UTC)
- Subject: Remove some TARGET_E500 checks
The normal test used in the PowerPC back end for E500 floating point is
(TARGET_HARD_FLOAT && !TARGET_FPRS). A few places apparently arbitrarily
add a TARGET_E500 check. This can cause problems where you have some E500
multilib options, and then a testcase uses -mcpu and causes TARGET_E500 to
be false but the more specific E500 options to be true.
This patch changes one place to use (TARGET_SPE || TARGET_E500_DOUBLE) in
place of TARGET_E500 and some others not to use TARGET_E500 and so to rely
on (TARGET_HARD_FLOAT && !TARGET_FPRS). Tested powerpc-none-linux-gnuspe.
OK to commit?
Because TARGET_FPRS is defined by default to a constant just like
TARGET_E500, this should have no effect on what gets compiled out by
default.
2006-12-21 Joseph Myers <joseph@codesourcery.com>
* config/rs6000/rs6000.c (print_operand): Check (TARGET_SPE ||
TARGET_E500_DOUBLE), not TARGET_E500, for %y.
(rs6000_generate_compare, rs6000_emit_sCOND, output_cbranch,
rs6000_emit_cmove): Don't check TARGET_E500.
* config/rs6000/rs6000.md (bunordered, bordered, sunordered,
sordered): Don't check TARGET_E500.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 120102)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -11016,7 +11026,8 @@
tmp = XEXP (x, 0);
/* Ugly hack because %y is overloaded. */
- if (TARGET_E500 && GET_MODE_SIZE (GET_MODE (x)) == 8)
+ if ((TARGET_SPE || TARGET_E500_DOUBLE)
+ && GET_MODE_SIZE (GET_MODE (x)) == 8)
{
/* Handle [reg]. */
if (GET_CODE (tmp) == REG)
@@ -11315,7 +11326,7 @@
compare_result = gen_reg_rtx (comp_mode);
/* E500 FP compare instructions on the GPRs. Yuck! */
- if ((TARGET_E500 && !TARGET_FPRS && TARGET_HARD_FLOAT)
+ if ((!TARGET_FPRS && TARGET_HARD_FLOAT)
&& rs6000_compare_fp_p)
{
rtx cmp, or_result, compare_result2;
@@ -11508,7 +11519,7 @@
under flag_finite_math_only we don't bother. */
if (rs6000_compare_fp_p
&& !flag_finite_math_only
- && !(TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)
+ && !(TARGET_HARD_FLOAT && !TARGET_FPRS)
&& (code == LE || code == GE
|| code == UNEQ || code == LTGT
|| code == UNGT || code == UNLT))
@@ -11558,7 +11569,7 @@
condition_rtx = rs6000_generate_compare (code);
cond_code = GET_CODE (condition_rtx);
- if (TARGET_E500 && rs6000_compare_fp_p
+ if (rs6000_compare_fp_p
&& !TARGET_FPRS && TARGET_HARD_FLOAT)
{
rtx t;
@@ -11665,7 +11676,7 @@
code = reverse_condition (code);
}
- if ((TARGET_E500 && !TARGET_FPRS && TARGET_HARD_FLOAT) && mode == CCFPmode)
+ if ((!TARGET_FPRS && TARGET_HARD_FLOAT) && mode == CCFPmode)
{
/* The efscmp/tst* instructions twiddle bit 2, which maps nicely
to the GT bit. */
@@ -12081,7 +12092,7 @@
return rs6000_emit_int_cmove (dest, op, true_cond, false_cond);
return 0;
}
- else if (TARGET_E500 && TARGET_HARD_FLOAT && !TARGET_FPRS
+ else if (TARGET_HARD_FLOAT && !TARGET_FPRS
&& SCALAR_FLOAT_MODE_P (compare_mode))
return 0;
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 120102)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -11421,12 +11421,12 @@
(define_expand "bunordered"
[(use (match_operand 0 "" ""))]
- "! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
+ "! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
"{ rs6000_emit_cbranch (UNORDERED, operands[0]); DONE; }")
(define_expand "bordered"
[(use (match_operand 0 "" ""))]
- "! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
+ "! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
"{ rs6000_emit_cbranch (ORDERED, operands[0]); DONE; }")
(define_expand "buneq"
@@ -11555,12 +11555,12 @@
(define_expand "sunordered"
[(clobber (match_operand:SI 0 "gpc_reg_operand" ""))]
- "! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
+ "! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
"{ rs6000_emit_sCOND (UNORDERED, operands[0]); DONE; }")
(define_expand "sordered"
[(clobber (match_operand:SI 0 "gpc_reg_operand" ""))]
- "! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
+ "! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
"{ rs6000_emit_sCOND (ORDERED, operands[0]); DONE; }")
(define_expand "suneq"
--
Joseph S. Myers
joseph@codesourcery.com