Re: x86 patch: SSE-based FP<=>int conversions, round 2

[Michael Matz <matz at suse dot de>]

Hi,

On Wed, 13 Dec 2006, Stuart Hastings wrote:

> >In general if one makes changes especially to the "strange looking" 
> >aspects of x86-64 which implement things in seemingly suboptimal ways 
> >(going over memory, or going different ways depending on data flow 
> >direction, or doing stuff separately which can also be done in one 
> >insn) one should be extremely cautious and measure all these changes on 
> >AMD64 carefully.  Much of the funny stuff has a reason.
> 
> O.K., if I add
> 
>  if (TARGET_ATHLON_K8)
>    FAIL;
> 
> to the body of this pattern, would that satisfy?

I guess, let's Honza decide ...

> >This for instance is something you don't want in general :)  You want 
> >to go over memory here (for AMD64 at least, haven't checked with 
> >Intel).
> 
> I been told that Intel hardware dislikes differently-sized load/store 
> operations on the same location.

Oh, sorry.  Yes this is the same for AMD due to store forwarding you want 
to have equal sized stores and loads.  I missed that this was about 
%edx->mem32;%eax->mem32;mem64->%xmm (and thought it was about 
%rax->mem64->%xmm), sorry.


Ciao,
Michael.