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Re: [PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug
- From: "Ulrich Weigand" <uweigand at de dot ibm dot com>
- To: matz at suse dot de (Michael Matz)
- Cc: bergner at vnet dot ibm dot com (Peter Bergner), pinskia at gmail dot com (Andrew Pinski), gcc-patches at gcc dot gnu dot org
- Date: Fri, 8 Dec 2006 18:15:14 +0100 (CET)
- Subject: Re: [PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug
Michael Matz wrote:
> The constraints in that instruction seem to not forbid reg 65. Hence
> global (in fact regclass.c) has no reason to believe that it can not be
> used for that operand (the register allocator is driven only by the
> constraints as far as register classes are concerned). The predicate must
> not reject registers which the constraints accept. If for some reason you
> need to reject some hardregs already in the predicate then you need to
> create a new register class which also excludes that register and use that
> in the constraints.
That's what I thought at first, but operand 0 in *addsi3_internal has
only 'r' as constraint, which should be interpreted as GENERAL_REGS,
and that class does not contain reg 65 ...
Any idea why global/regclass might not respect that?
Dr. Ulrich Weigand
GNU Toolchain for Linux on System z and Cell BE