Doing diffs in .: --- ./boehm-gc/configure.ac.~1~ 2006-11-16 23:25:37.000000000 -0800 +++ ./boehm-gc/configure.ac 2006-11-26 17:47:25.000000000 -0800 @@ -267,11 +267,13 @@ case "$host" in AC_CHECK_MEMBER(i386_thread_state_t.eax, AC_DEFINE(HAS_I386_THREAD_STATE_EAX,,dnl [i386_thread_state_t has field eax]),, - [#include ]) + [#include +#include ]) AC_CHECK_MEMBER(i386_thread_state_t.__eax, AC_DEFINE(HAS_I386_THREAD_STATE___EAX,,dnl [i386_thread_state_t has field __eax]),, - [#include ]) + [#include +#include ]) ;; *) ;; esac --- ./boehm-gc/darwin_stop_world.c.~1~ 2006-11-26 16:52:10.000000000 -0800 +++ ./boehm-gc/darwin_stop_world.c 2006-11-26 17:55:35.000000000 -0800 @@ -49,6 +49,15 @@ # else # error can not work out how to access fields of i386_thread_state_t # endif +#elif defined(__x86_64__) +# define THREAD_STATE i386_thread_state_t +# if defined (HAS_I386_THREAD_STATE_EAX) +# define THREAD_FLD(x) x +# elif defined (HAS_I386_THREAD_STATE___EAX) +# define THREAD_FLD(x) __ ## x +# else +# error can not work out how to access fields of i386_thread_state_t +# endif #else # error unknown architecture #endif @@ -127,15 +136,15 @@ void GC_push_all_stacks() { if(r != KERN_SUCCESS) ABORT("thread_get_state failed"); #if defined(I386) - lo = state.esp; + lo = (void*)state . THREAD_FLD (esp); - GC_push_one(state.eax); - GC_push_one(state.ebx); - GC_push_one(state.ecx); - GC_push_one(state.edx); - GC_push_one(state.edi); - GC_push_one(state.esi); - GC_push_one(state.ebp); + GC_push_one(state . THREAD_FLD (eax)); + GC_push_one(state . THREAD_FLD (ebx)); + GC_push_one(state . THREAD_FLD (ecx)); + GC_push_one(state . THREAD_FLD (edx)); + GC_push_one(state . THREAD_FLD (edi)); + GC_push_one(state . THREAD_FLD (esi)); + GC_push_one(state . THREAD_FLD (ebp)); #elif defined(POWERPC) lo = (void*)(state . THREAD_FLD (r1) - PPC_RED_ZONE_SIZE); --- ./boehm-gc/include/private/gcconfig.h.~1~ 2006-11-26 16:52:55.000000000 -0800 +++ ./boehm-gc/include/private/gcconfig.h 2006-11-17 01:06:00.000000000 -0800 @@ -302,7 +302,7 @@ # if defined(__ppc__) || defined(__ppc64__) # define POWERPC # define mach_type_known -# elif defined(__i386__) +# elif defined(__i386__) || defined(__x86_64) # define I386 # define mach_type_known # endif @@ -787,7 +787,7 @@ # define DATAEND (_end) # endif # ifdef DARWIN -# ifdef __ppc64__ +# if defined(__ppc64__) || defined(__x86_64) # define ALIGNMENT 8 # define CPP_WORDSZ 64 # else --- ./configure.in.~1~ 2006-11-16 23:27:02.000000000 -0800 +++ ./configure.in 2006-11-16 23:34:25.000000000 -0800 @@ -368,14 +368,9 @@ case "${target}" in *-*-chorusos) noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" ;; - powerpc-*-darwin*) - noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes gdb gprof" - noconfigdirs="$noconfigdirs sim target-rda" - ;; *-*-darwin*) - noconfigdirs="$noconfigdirs ld gas gdb gprof" + noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes gdb gprof" noconfigdirs="$noconfigdirs sim target-rda" - noconfigdirs="$noconfigdirs ${libgcj}" ;; *-*-freebsd[[12]] | *-*-freebsd[[12]].* | *-*-freebsd*aout*) noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" --- ./libjava/sysdep/i386/locks.h.~1~ 2006-11-16 23:26:57.000000000 -0800 +++ ./libjava/sysdep/i386/locks.h 2006-11-17 17:09:46.000000000 -0800 @@ -1,6 +1,6 @@ -// locks.h - Thread synchronization primitives. X86 implementation. +/* locks.h - Thread synchronization primitives. X86/x86-64 implementation. -/* Copyright (C) 2002 Free Software Foundation + Copyright (C) 2002 Free Software Foundation This file is part of libgcj. @@ -20,21 +20,28 @@ typedef size_t obj_addr_t; /* Integer ty // cannot execute before the compare_and_swap finishes. inline static bool compare_and_swap(volatile obj_addr_t *addr, - obj_addr_t old, - obj_addr_t new_val) + obj_addr_t old, + obj_addr_t new_val) { char result; - __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1" - : "=m"(*addr), "=q"(result) +#ifdef __x86_64__ + __asm__ __volatile__("lock; cmpxchgq %2, %0; setz %1" + : "=m"(*(addr)), "=q"(result) : "r" (new_val), "a"(old), "m"(*addr) : "memory"); +#else + __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1" + : "=m"(*addr), "=q"(result) + : "r" (new_val), "a"(old), "m"(*addr) + : "memory"); +#endif return (bool) result; } // Set *addr to new_val with release semantics, i.e. making sure // that prior loads and stores complete before this // assignment. -// On X86, the hardware shouldn't reorder reads and writes, +// On X86/x86-64, the hardware shouldn't reorder reads and writes, // so we just have to convince gcc not to do it either. inline static void release_set(volatile obj_addr_t *addr, obj_addr_t new_val) @@ -48,15 +55,15 @@ release_set(volatile obj_addr_t *addr, o // implementation can be the same. inline static bool compare_and_swap_release(volatile obj_addr_t *addr, - obj_addr_t old, - obj_addr_t new_val) + obj_addr_t old, + obj_addr_t new_val) { return compare_and_swap(addr, old, new_val); } // Ensure that subsequent instructions do not execute on stale // data that was loaded from memory before the barrier. -// On X86, the hardware ensures that reads are properly ordered. +// On X86/x86-64, the hardware ensures that reads are properly ordered. inline static void read_barrier() { @@ -67,7 +74,8 @@ read_barrier() inline static void write_barrier() { - // X86 does not reorder writes. We just need to ensure that gcc also doesn't. + /* x86-64/X86 does not reorder writes. We just need to ensure that + gcc also doesn't. */ __asm__ __volatile__(" " : : : "memory"); } #endif --- ./libjava/sysdep/x86-64/locks.h.~1~ 2006-11-16 23:26:57.000000000 -0800 +++ ./libjava/sysdep/x86-64/locks.h 2006-11-17 17:09:40.000000000 -0800 @@ -1,4 +1,4 @@ -/* locks.h - Thread synchronization primitives. x86-64 implementation. +/* locks.h - Thread synchronization primitives. X86/x86-64 implementation. Copyright (C) 2002 Free Software Foundation @@ -21,7 +21,9 @@ typedef size_t obj_addr_t; /* Integer ty // Assumed to have acquire semantics, i.e. later memory operations // cannot execute before the compare_and_swap finishes. inline static bool -compare_and_swap(volatile obj_addr_t *addr, obj_addr_t old, obj_addr_t new_val) +compare_and_swap(volatile obj_addr_t *addr, + obj_addr_t old, + obj_addr_t new_val) { char result; #ifdef __x86_64__ @@ -31,7 +33,7 @@ compare_and_swap(volatile obj_addr_t *ad : "memory"); #else __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1" - : "=m"(*(addr)), "=q"(result) + : "=m"(*addr), "=q"(result) : "r" (new_val), "a"(old), "m"(*addr) : "memory"); #endif @@ -41,7 +43,7 @@ compare_and_swap(volatile obj_addr_t *ad // Set *addr to new_val with release semantics, i.e. making sure // that prior loads and stores complete before this // assignment. -// On x86-64, the hardware shouldn't reorder reads and writes, +// On X86/x86-64, the hardware shouldn't reorder reads and writes, // so we just have to convince gcc not to do it either. inline static void release_set(volatile obj_addr_t *addr, obj_addr_t new_val) @@ -63,7 +65,7 @@ compare_and_swap_release(volatile obj_ad // Ensure that subsequent instructions do not execute on stale // data that was loaded from memory before the barrier. -// On x86-64, the hardware ensures that reads are properly ordered. +// On X86/x86-64, the hardware ensures that reads are properly ordered. inline static void read_barrier() { @@ -74,8 +76,8 @@ read_barrier() inline static void write_barrier() { - /* x86-64 does not reorder writes. We just need to ensure that gcc also - doesn't. */ + /* x86-64/X86 does not reorder writes. We just need to ensure that + gcc also doesn't. */ __asm__ __volatile__(" " : : : "memory"); } #endif --------------