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Re: [patch] tuning gcc for Intel Core2
- From: Vladimir Makarov <vmakarov at redhat dot com>
- To: "H. J. Lu" <hjl at lucon dot org>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 13 Nov 2006 17:03:03 -0500
- Subject: Re: [patch] tuning gcc for Intel Core2
- References: <4558A4DD.1080407@redhat.com> <20061113204120.GA8174@lucon.org>
H. J. Lu wrote:
On Mon, Nov 13, 2006 at 12:01:17PM -0500, Vladimir Makarov wrote:
Index: doc/invoke.texi
===================================================================
--- doc/invoke.texi (revision 118669)
+++ doc/invoke.texi (working copy)
@@ -9281,6 +9281,9 @@ set support.
@item nocona
Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
SSE2 and SSE3 instruction set support.
+@item core2
+Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2 and SSE3
+instruction set support.
Please add SSSE3.
I've done that
Index: doc/invoke.texi
===================================================================
--- doc/invoke.texi (revision 118669)
+++ doc/invoke.texi (working copy)
@@ -9281,6 +9281,9 @@ set support.
@item nocona
Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
SSE2 and SSE3 instruction set support.
+@item core2
+Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+instruction set support.
@item k6
AMD K6 CPU with MMX instruction set support.
@item k6-2, k6-3