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Re: [PATCH] Add POWER6 machine description
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: David Edelsohn <dje at makai dot watson dot ibm dot com>, Rask Ingemann Lambertsen <rask at sygehus dot dk>, gcc-patches at gcc dot gnu dot org
- Date: Mon, 30 Oct 2006 13:48:53 -0600
- Subject: Re: [PATCH] Add POWER6 machine description
- References: <Pine.LNX.firstname.lastname@example.org>
On Sat, 2006-10-28 at 19:26 -0600, Roger Sayle wrote:
> The recog.c change looks good. As this is just a generalization of
> the current store_data_bypass_p, where we'd currently gcc_assert if
> not passed a single set, it shouldn't affect any other platform.
> This part is OK for mainline. I'll let you decide whether you want
> to commit this separately (my preference), or at the same time as
> the revised power6 patch, once that's approved.
Ok, I committed the following recog.c change separately. Thanks.
* recog.c (store_data_bypass_p): Add support to allow IN_INSN to
be a PARALLEL containing sets. Return false when out_pat is not
a PARALLEL insn.
I'll now respin the rest of the patch taking into account the comments
from David and Rask.