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Re: PATCH: x86/x86-64: Support Intel SSSE3/MNI intrinsics
- From: Andrew Pinski <pinskia at physics dot uc dot edu>
- To: "H. J. Lu" <hjl at lucon dot org>
- Cc: Mark Mitchell <mark at codesourcery dot com>, Ian Lance Taylor <iant at google dot com>, gcc-patches at gcc dot gnu dot org
- Date: Thu, 28 Sep 2006 06:55:51 -0700
- Subject: Re: PATCH: x86/x86-64: Support Intel SSSE3/MNI intrinsics
- References: <20060224204733.GA1714@lucon.org> <E9478302-EE79-4C47-973D-417CAFBA7A6B@apple.com> <20060626182743.GA9896@lucon.org> <m33bdif1tt.fsf@localhost.localdomain> <20060705183055.GA9428@lucon.org> <20060710223553.GA10395@lucon.org> <m3u05lnf16.fsf@localhost.localdomain> <44B6FFDF.80700@codesourcery.com> <20060928134749.GA19128@lucon.org>
On Thu, 2006-09-28 at 06:47 -0700, H. J. Lu wrote:
> SSSE3, aka MNI, is published at
>
> http://developer.intel.com/design/Pentium4/manuals/index_new.htm
>
> Here is the updated SSSE3 intrinsic patch.
To me ssse3 looks too close to sse3 to add an option like that. People
are going to be confused.
> @@ -9516,6 +9516,8 @@ preferred alignment to @option{-mpreferr
> @itemx -mno-sse2
> @item -msse3
> @itemx -mno-sse3
> +@item -mssse3
> +@itemx -mno-ssse3
> @item -m3dnow
> @itemx -mno-3dnow
> @opindex mmmx
Also you need to add to the sentence after the options about SSSE3 (and
SSE3):
> These switches enable or disable the use of instructions in the MMX,
> SSE, SSE2 or 3DNow! extended instruction sets. These extensions are
> also available as built-in functions: see @ref{X86 Built-in
> Functions},
> for details of the functions enabled and disabled by these switches.
Actually I think this part of the document needs a rewrite now since
there are no too many options together and adding more is going to make
this look silly.
Also you forgot to update "X86 Built-in Functions" Section in the
document which needs some love right now since it is not up to date and
still references old non existent functions.
Thanks,
Andrew Pinski