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Re: [patch] require sse3 for fisttp

We have discussed this a couple of months ago, where we decided that -msse3 should enable fisttp.

I know, I was in this discussion.

However, looking at your patch, I can't see why it should be better than current implementation. Currently, fisttp is enabled only when -msse3 is selected _or_ -march=nocona is specified. This is IMO the best combination that has some logic in it:

a) user specifies -msse3 and (even if it is counter-intuitive), fisttp is generated. This is added to follow Intel arch manual.
b) user specifies -march=nocona. As all nocona cores have fisttp, fisttp is generated even without -msse3.

The problem might arise for -march=nocona -mno-sse, where fisttp is still generated. But since user knows that his code will run only on nocona, but he wants to disable sse insn set (IMO this means usage of xmm registers), everything should be OK.

No, this isn't OK if he has a core that is very like nocona, but doesn't have the sse3 instruction set. This will cause an invalid instruction error.

Another problem is 64bit -march=k8 -mfpmath=387, where not all k8 processors have sse3 and fisttp. There is nothing we can do, but expect user to provide -msse3 in this case.


I can't see the benefit of having fisttp disabled by default on nocona (this is the only target_fisttp target).

Nocona already turns on sse3 by default which would enable fisttp.


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