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Re: [PATCH] Fix PR target/28946
On Tue, Sep 05, 2006 at 07:21:32PM +0200, Uros Bizjak wrote:
> H. J. Lu wrote:
>
> >On Tue, Sep 05, 2006 at 07:20:02AM -0600, Roger Sayle wrote:
> >
> >
> >>On Tue, 5 Sep 2006, Uros Bizjak wrote:
> >>
> >>
> >>>2006-09-06 Uros Bizjak <uros@kss-loka.si>
> >>>
> >>> PR target/28946
> >>> * combine.c (try_combine): Force PARALLEL of comparison and
> >>> arithmetic insn even if arithmetic result is not used.
> >>>
> >>> * gcc.target/i386/pr28946.c: New test.
> >>>
> >>>
> >>I was going to point out tht a generic change to combine like this
> >>really needs more testing that C & C++ on x86, especially during
> >>stage 3. However, from your latest comments in the bugzilla PR it
> >>
> >>
> >
> >As I have pointed out in the bug report, some recent processors need
> >the extra "testl %eax, %eax" here
> >
> > shrl $5, %eax
> > testl %eax, %eax
> >
> >to avoid partial flag register stall since a shift instruction may
> >not set flag register since shift count may be 0.
> >
> >
> >
> According to the comment in i386.md, shift by zero problem is addressed
> this way:
The current IA32 optimization manual covers partial flag register
stall, which happens to all shift instructions due to shift by 0,
which is only known at execution time.
H.J.