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Re: [patch] [4.2 projects] vectorize type conversions - 4/6


Dorit Nuzman wrote on 02/12/06 08:46:

> One option is to have each of the 4 vector stmts feed the next (i.e., use
> one accumulator):
> loop:
>       vd = phi (init, vd)
>       va = vd + vw
>       vb = va + vx
>       vc = vb + vy
>       vd = vc + vz
> 
> Another option is to use four accumulators, and combine them together at
> the loop epilog:
> loop:
>       va = phi (init, va)
>       vb = phi (init, vb)
>       vc = phi (init, vc)
>       vd = phi (init, vd)
>       va = va + vw
>       vb = vb + vx
>       vc = vc + vy
>       vd = vd + vz
> epilog:
>       vd = (va + vb + vc + vd)
> 
> We currently generate the first option (single accumulator). The thought is
> in the future to generate the other scheme (multiple accumulators) if the
> flag -fvariable-expansion-in-unroller is specified.
> 
What would be the advantage of the second approach?  More scheduling
freedom?


> :ADDPATCH SSA (vectorizer):
> 
>         * tree-vect-transform.c (vectorizable_reduction): Support in the
>         presence of multiple datatypes.
>         (vect_transform_stmt): Removed redundant code.
> 
> 
>         * gcc.dg/vect/vect-multitypes-7.c: New test.
> 
OK.

> !       /* Arguments are ready. create the new vector stmt.  */
> !                                                                                 
> !       if (op_type == binary_op)
> !         expr = build2 (code, vectype, loop_vec_def0, reduc_def);
> !       else
> !         expr = build3 (code, vectype, loop_vec_def0, loop_vec_def1, reduc_def);
> !       new_stmt = build2 (MODIFY_EXPR, vectype, vec_dest, expr);
>
s/vectype/void_type_node/


:REVIEWMAIL:


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