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Re:[m32c] Fix TN-16C-A156A/E (mul.w)
- From: "Naveen H.S." <naveenh at KPITCummins dot com>
- To: "DJ Delorie" <dj at redhat dot com>
- Cc: <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 5 Jul 2006 12:44:06 +0530
- Subject: Re:[m32c] Fix TN-16C-A156A/E (mul.w)
Hi,
>> This works around tech note TN-16C-A156A/E.
Please note that like "mul.w", "mulu.w" instruction also supports
only registers for destination.
Please find attached the patch below that allows only registers as
its destination for "mulu.w" like "mul.w" instruction.
No new regressions found.
ChangeLog
2006-07-05 Naveen.H.S <naveenh@kpitcummins.com>
* config/m32c/muldiv.md (umulhisi3_c): Use only
registers for
dest.
(umulhisi3_r): Likewise.
Index: config/m32c/muldiv.md
===================================================================
--- gcc/config/m32c/muldiv.md.orig 2006-07-04 17:59:56.000000000
+0530
+++ gcc/config/m32c/muldiv.md 2006-07-05 12:07:23.000000000 +0530
@@ -107,18 +107,18 @@
)
(define_insn "umulhisi3_c"
- [(set (match_operand:SI 0 "mra_operand" "=RsiSd,??Rmm")
- (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand"
"%0,0"))
- (match_operand 2 "immediate_operand" "i,i")))]
+ [(set (match_operand:SI 0 "ra_operand" "=Rsi")
+ (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand"
"%0"))
+ (match_operand 2 "immediate_operand" "i")))]
""
"mulu.w\t%u2,%1"
[(set_attr "flags" "o")]
)
(define_insn "umulhisi3_r"
- [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
- (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand"
"%0,0,0,0"))
- (zero_extend:SI (match_operand:HI 2 "mra_operand"
"RhiSd,?Rmm,RhiSd,?Rmm"))))]
+ [(set (match_operand:SI 0 "mra_operand" "=Rsi,Rsi")
+ (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand"
"%0,0"))
+ (zero_extend:SI (match_operand:HI 2 "mra_operand"
"RhiSd,?Rmm"))))]
""
"mulu.w\t%u2,%1"
[(set_attr "flags" "o")]
Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA)
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