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Re: [patch] MIPS V2SF RTL patterns
"Chao-ying Fu" <firstname.lastname@example.org> writes:
> The MIPS32 DSP patch uses a fixed DSP control register for
> the comparison result. We can only use builtin functions to generate
> compare instructions. To fit in to the scheme of using a vector of BI mode,
> we may need to create a new register class to store the comparison results,
> and create new RTL instructions for compare patterns.
I was assuming we could just use a fixed "CC" register for the DSP
instructions, a bit like we do when there's only one $fcc available.
There should be no need for extra register classes in that case.
> Another topic: the underlying data for the MIPS32 DSP may be Q15 or
> Q31 fractional data. The arithmetic for fractional data is different
> from that for integer data. GCC cannot recognize the fractional data
> to generate correct operators (ex: multiplication) for it. Thus, we
> may propose to create a new machine mode for fractional data in GCC.
> Besides, we may want to add some new C data types: Q15, Q31, Q63.
> Q15 a, b, c;
> Q31 x, y, z;
> c = a * b;
> z = x / y;
> How do you think about this project of adding the fractional data support
> in GCC?
Sounds good ;) I suppose it ties in with messages about supporting
Embedded C and DSP-C in gcc (which basically seem to amount to
"Has anyone done that?" "No."). Perhaps the fixed-point feature
could be added in isolation, if that's the only one you need?