Re: [patch] MIPS V2SF RTL patterns

["Chao-ying Fu" <fu at mips dot com>]

Hi,

  Maybe you are right.  My thinking is not very clear.  The issues for
the MIPS32 DSP are not a single register for comparison results.

  The MIPS32 DSP patch uses a fixed DSP control register for
the comparison result.  We can only use builtin functions to generate
compare instructions.  To fit in to the scheme of using a vector of BI mode,
we may need to create a new register class to store the comparison results,
and create new RTL instructions for compare patterns.

  Another topic: the underlying data for the MIPS32 DSP may be Q15 or Q31
fractional data.  The arithmetic for fractional data is different from that
for integer
data.  GCC cannot recognize the fractional data to generate correct
operators
(ex: multiplication) for it.  Thus, we may propose to create a new machine
mode for
fractional data in GCC.  Besides, we may want to add some new C data types:
Q15, Q31, Q63.

Ex:
Q15 a, b, c;
Q31 x, y, z;
c = a * b;
z = x / y;

  How do you think about this project of adding the fractional data support
in GCC?
Thanks a lot!

Regards,
Chao-ying

----- Original Message ----- 
From: "Richard Sandiford" <richard@codesourcery.com>
To: "Fu, Chao-Ying" <fu@mips.com>
Cc: <gcc-patches@gcc.gnu.org>; "Thekkath, Radhika" <radhika@mips.com>
Sent: Tuesday, May 09, 2006 12:57 AM
Subject: Re: [patch] MIPS V2SF RTL patterns


> "Fu, Chao-Ying" <fu@mips.com> writes:
> > Hi Richard,
> >
> >   Your patch looks good.  Thanks a lot!
>
> Thanks, now committed.
>
> >   Unlike 8 separate FCC registers, the MIPS32 DSP uses
> > 4 bits in a DSP control register for comparison results.
> > It may be a problem to deal with the single register scheme by
> > using a vector of BI mode, I guess.
>
> Sorry, I'm not sure I follow.  Why couldn't the ccond field of the DSP
> control register be treated as a vector of BI mode?  I don't really
> see how it's different from the fcc field of FCSR.  (That's a genuine
> question, in case it doesn't read like one.  I think I'm missing
> something here.)
>
> Richard
>