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Re: [RFC] Matrix Flattening optimization
On Fri, 2006-03-03 at 15:53 +0100, Falk Hueffner wrote:
> "Richard Guenther" <richard.guenther@gmail.com> writes:
>
> > Even padding to either power-of-two row size (for cheap
> > multiplication) or cache-line aligned row-size if cheap enough may
> > be worth in general.
>
> Power-of-two rows can increase the probability of cache line thrashing
> due to mapping conflicts (depending on the cache architecture), so
> actually you might want to avoid them.
>
> BTW, what about targets where a multiplication is slower than an
> indirect access? Unless strength reduction can be done, this
> transformation might actually lead to a slowdown there...
>
Errr, it's unlikely that you've got a platform where cache misses are
less expensive than arithmetic :)
It's very rare that this transformation is going to slow things down,
and if it does, such is life. It's certainly not something you could
detect very easily and avoid.