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Re: [rfc] Make regrename call recog



working on a S/390 patch optimizing load/store multiple I've
noticed that regrename replaces registers without calling
recog afterwards. So it happened that a single register out
of a PARALLEL block of SETs gets renamed. Because the
load_multiple patterns only accept SETs with consecutive
registers this insn is invalid after regrename.

The attached patch turns "do_replace" in "try_replace" using
validate_change to replace the register along the def-use chain.

IIRC the ARM used to have a similar problem.


Is this the way to go?

IMO, no. The renamer is careful to modify insns only in such a way that the constraints are still met. If that isn't the case on S/390, it means that the constraint strings are incorrect. In the ARM case, I think it happened for an insn that only ever got generated with hard regs in place and thus never needed any reloading, which is why this wasn't detected before. Is that true for your pattern as well?



Bernd



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