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Re: [RFA] Nonfunctioning split in rs6000 back-end
- From: Paolo Bonzini <paolo dot bonzini at lu dot unisi dot ch>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>, David Edelsohn <dje at watson dot ibm dot com>
- Date: Wed, 24 Aug 2005 14:08:09 +0200
- Subject: Re: [RFA] Nonfunctioning split in rs6000 back-end
- References: <430A3040.7000007@lu.unisi.ch> <200508222106.j7ML6wd32428@makai.watson.ibm.com> <430B2E1D.2020200@lu.unisi.ch> <200508231535.j7NFZsd32622@makai.watson.ibm.com> <20050824091608.GA10320@bubble.grove.modra.org>
Alan Modra wrote:
On Tue, Aug 23, 2005 at 11:35:54AM -0400, David Edelsohn wrote:
Paolo Bonzini writes:
* config/rs6000/predicates.md (equality_operator): New.
* config/rs6000/rs6000.md: Rewrite as a peephole2 the split for
comparison with a large constant.
This is responsible for a powerpc64-linux bootstrap failure.
My apologies. Can you try the attached patch?
Paolo
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.403
diff -p -u -u -r1.403 rs6000.md
--- rs6000.md 23 Aug 2005 17:39:55 -0000 1.403
+++ rs6000.md 24 Aug 2005 11:03:40 -0000
@@ -10728,27 +10728,37 @@
"{cmp%I2|cmp<wd>%I2} %0,%1,%2"
[(set_attr "type" "cmp")])
;; If we are comparing a register for equality with a large constant,
;; we can do this with an XOR followed by a compare. But this is profitable
;; only if the large constant is only used for the comparison (and in this
;; case we already have a register to reuse as scratch).
+;;
+;; For 64-bit registers, we could only do so if the constant's bit 15 is clear:
+;; otherwise we'd need to XOR with FFFFFFFF????0000 which is not available.
(define_peephole2
- [(set (match_operand:GPR 0 "register_operand")
- (match_operand:GPR 1 "logical_operand" ""))
- (set (match_dup 0) (match_operator:GPR 3 "boolean_or_operator"
+ [(set (match_operand:SI 0 "register_operand")
+ (match_operand:SI 1 "logical_operand" ""))
+ (set (match_dup 0) (match_operator:SI 3 "boolean_or_operator"
[(match_dup 0)
- (match_operand:GPR 2 "logical_operand" "")]))
+ (match_operand:SI 2 "logical_operand" "")]))
(set (match_operand:CC 4 "cc_reg_operand" "")
- (compare:CC (match_operand:GPR 5 "gpc_reg_operand" "")
+ (compare:CC (match_operand:SI 5 "gpc_reg_operand" "")
(match_dup 0)))
(set (pc)
(if_then_else (match_operator 6 "equality_operator"
[(match_dup 4) (const_int 0)])
(match_operand 7 "" "")
(match_operand 8 "" "")))]
- "peep2_reg_dead_p (3, operands[0])"
- [(set (match_dup 0) (xor:GPR (match_dup 5) (match_dup 9)))
+ "peep2_reg_dead_p (3, operands[0])
+ && peep2_reg_dead_p (4, operands[4])"
+ [(set (match_dup 0) (xor:SI (match_dup 5) (match_dup 9)))
(set (match_dup 4) (compare:CC (match_dup 0) (match_dup 10)))
(set (pc) (if_then_else (match_dup 6) (match_dup 7) (match_dup 8)))]
@@ -10757,7 +10767,7 @@
when sign-extended from 16 to 32 bits. Then see what constant we could
XOR with SEXTC to get the sign-extended value. */
rtx cnst = simplify_const_binary_operation (GET_CODE (operands[3]),
- GET_MODE (operands[3]),
+ SImode,
operands[1], operands[2]);
HOST_WIDE_INT c = INTVAL (cnst);
HOST_WIDE_INT sextc = ((c & 0xffff) ^ 0x8000) - 0x8000;