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Re: PATCH: PR target/23485: [ia64]: Integer dvide by zero doesn't raise a signal
On Fri, Aug 19, 2005 at 01:43:32PM -0700, Richard Henderson wrote:
> >
> > Icc inlines x/y and raises interger divide-by-zero exception if y
> > is zero.
>
> So I guess the patch is ok, and we'll need to see about
> inserting the break in the inline expansion.
>
>
How about this patch?
H.J.
---
2005-08-20 H.J. Lu <hongjiu.lu@intel.com>
PR target/23485
* config/ia64/ia64.md (divsi3): Check divide by zero.
(modsi3): Likewise.
(udivsi3): Likewise.
(umodsi3): Likewise.
(divdi3): Likewise.
(moddi3): Likewise.
(udivdi3): Likewise.
(umoddi3): Likewise.
--- gcc/config/ia64/ia64.md.in-zero 2005-05-18 08:59:54.000000000 -0700
+++ gcc/config/ia64/ia64.md 2005-08-20 11:23:37.666103880 -0700
@@ -1973,6 +1973,9 @@
{
rtx op1_xf, op2_xf, op0_xf, op0_di, twon34, twon34_exp;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (SImode),
+ CONST1_RTX (SImode)));
+
op0_xf = gen_reg_rtx (XFmode);
op0_di = gen_reg_rtx (DImode);
@@ -2007,6 +2010,9 @@
{
rtx op2_neg, op1_di, div;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (SImode),
+ CONST1_RTX (SImode)));
+
div = gen_reg_rtx (SImode);
emit_insn (gen_divsi3 (div, operands[1], operands[2]));
@@ -2030,6 +2036,9 @@
{
rtx op1_xf, op2_xf, op0_xf, op0_di, twon34, twon34_exp;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (SImode),
+ CONST1_RTX (SImode)));
+
op0_xf = gen_reg_rtx (XFmode);
op0_di = gen_reg_rtx (DImode);
@@ -2064,6 +2073,9 @@
{
rtx op2_neg, op1_di, div;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (SImode),
+ CONST1_RTX (SImode)));
+
div = gen_reg_rtx (SImode);
emit_insn (gen_udivsi3 (div, operands[1], operands[2]));
@@ -2398,6 +2410,9 @@
{
rtx op1_xf, op2_xf, op0_xf;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (DImode),
+ CONST1_RTX (DImode)));
+
op0_xf = gen_reg_rtx (XFmode);
if (CONSTANT_P (operands[1]))
@@ -2427,6 +2442,9 @@
{
rtx op2_neg, div;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (DImode),
+ CONST1_RTX (DImode)));
+
div = gen_reg_rtx (DImode);
emit_insn (gen_divdi3 (div, operands[1], operands[2]));
@@ -2444,6 +2462,9 @@
{
rtx op1_xf, op2_xf, op0_xf;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (DImode),
+ CONST1_RTX (DImode)));
+
op0_xf = gen_reg_rtx (XFmode);
if (CONSTANT_P (operands[1]))
@@ -2473,6 +2494,9 @@
{
rtx op2_neg, div;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (DImode),
+ CONST1_RTX (DImode)));
+
div = gen_reg_rtx (DImode);
emit_insn (gen_udivdi3 (div, operands[1], operands[2]));