This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[patch] PR23376
- From: Steven Bosscher <stevenb at suse dot de>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Zdenek Dvorak <rakdver at atrey dot karlin dot mff dot cuni dot cz>
- Date: Mon, 15 Aug 2005 01:33:03 +0200
- Subject: [patch] PR23376
Hi,
The big comment in the patch really says it all. The underlying
problem is that there are no named patterns for MMX code, but we
need those for force_{operand,reg} in loop-unroll.c (and probably
elsewhere, where similar bugs may be lurking...). Bootstrapped
and tested on x86_64-unknown-linux-gnu. OK?
Gr.
Steven
Index: loop-unroll.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/loop-unroll.c,v
retrieving revision 1.37
diff -u -3 -p -r1.37 loop-unroll.c
--- loop-unroll.c 3 Aug 2005 13:34:35 -0000 1.37
+++ loop-unroll.c 14 Aug 2005 13:09:21 -0000
@@ -1574,7 +1574,19 @@ analyze_insn_to_expand_var (struct loop
&& GET_CODE (src) != MINUS
&& GET_CODE (src) != MULT)
return NULL;
-
+
+ /* Hmm, this is a bit paradoxical. We know that INSN is a valid insn
+ in MD. But if there is no optab to generate the insn, we can not
+ perform the variable expansion. This can happen if an MD provides
+ an insn but not a named pattern to generate it, for example to avoid
+ producing code that needs additional mode switches like for x87/mmx.
+
+ So we check have_insn_for which looks for an optab for the operation
+ in SRC. If it doesn't exist, we can't perform the expansion even
+ though INSN is valid. */
+ if (!have_insn_for (GET_CODE (src), GET_MODE (src)))
+ return NULL;
+
if (!XEXP (src, 0))
return NULL;
Index: testsuite/gcc.target/x86_64/pr23376.c
===================================================================
RCS file: testsuite/gcc.target/x86_64/pr23376.c
diff -N testsuite/gcc.target/x86_64/pr23376.c
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.target/x86_64/pr23376.c 14 Aug 2005 13:09:30 -0000
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -funroll-loops -fvariable-expansion-in-unroller" } */
+
+typedef int __m64 __attribute__ ((__vector_size__ (8)));
+typedef int __v2si __attribute__ ((__vector_size__ (8)));
+
+static __inline __m64 __attribute__((__always_inline__))
+_mm_add_pi32 (__m64 __m1, __m64 __m2)
+{
+ return (__m64) __builtin_ia32_paddd ((__v2si)__m1, (__v2si)__m2);
+}
+
+__m64
+simple_block_diff_up_mmx_4 (const int width, __m64 ref1)
+{
+ __m64 sum;
+ int count = width >>1;
+ while (count--)
+ sum = _mm_add_pi32 (sum, ref1);
+ return sum;
+}