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[PATCH, committed] PowerPC atomic fix


	The updated PowerPC atomic patterns need constraint "Z" for memory
operands. 

David

	* config/rs6000/sync.md (load_locked_<mode>): Use Z for
	memory_operand constraint.
	(store_conditional_<mode>): Same.
	(sync_compare_and_swap<mode>): Same.
	(sync_lock_test_and_set<mode>): Same.

Index: sync.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/sync.md,v
retrieving revision 1.3
diff -c -p -r1.3 sync.md
*** sync.md	7 Jul 2005 14:30:13 -0000	1.3
--- sync.md	9 Jul 2005 01:07:19 -0000
***************
*** 41,47 ****
  (define_insn "load_locked_<mode>"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
  	(unspec_volatile:GPR
! 	  [(match_operand:GPR 1 "memory_operand" "m")] UNSPECV_LL))]
    "TARGET_POWERPC"
    "<larx> %0,%y1"
    [(set_attr "type" "load_l")])
--- 41,47 ----
  (define_insn "load_locked_<mode>"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
  	(unspec_volatile:GPR
! 	  [(match_operand:GPR 1 "memory_operand" "Z")] UNSPECV_LL))]
    "TARGET_POWERPC"
    "<larx> %0,%y1"
    [(set_attr "type" "load_l")])
***************
*** 49,55 ****
  (define_insn "store_conditional_<mode>"
    [(set (match_operand:CC 0 "cc_reg_operand" "=x")
  	(unspec_volatile:CC [(const_int 0)] UNSPECV_SC))
!    (set (match_operand:GPR 1 "memory_operand" "=m")
  	(match_operand:GPR 2 "gpc_reg_operand" "r"))]
    "TARGET_POWERPC"
    "<stcx> %2,%y1"
--- 49,55 ----
  (define_insn "store_conditional_<mode>"
    [(set (match_operand:CC 0 "cc_reg_operand" "=x")
  	(unspec_volatile:CC [(const_int 0)] UNSPECV_SC))
!    (set (match_operand:GPR 1 "memory_operand" "=Z")
  	(match_operand:GPR 2 "gpc_reg_operand" "r"))]
    "TARGET_POWERPC"
    "<stcx> %2,%y1"
***************
*** 57,63 ****
  
  (define_insn_and_split "sync_compare_and_swap<mode>"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
! 	(match_operand:GPR 1 "memory_operand" "+m"))
     (set (match_dup 1)
  	(unspec_volatile:GPR
  	  [(match_operand:GPR 2 "reg_or_short_operand" "rI")
--- 57,63 ----
  
  (define_insn_and_split "sync_compare_and_swap<mode>"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
! 	(match_operand:GPR 1 "memory_operand" "+Z"))
     (set (match_dup 1)
  	(unspec_volatile:GPR
  	  [(match_operand:GPR 2 "reg_or_short_operand" "rI")
***************
*** 77,83 ****
  
  (define_insn_and_split "sync_lock_test_and_set<mode>"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
!         (match_operand:GPR 1 "memory_operand" "+m"))
     (set (match_dup 1)
  	(unspec_volatile:GPR
  	  [(match_operand:GPR 2 "reg_or_short_operand" "rL")]
--- 77,83 ----
  
  (define_insn_and_split "sync_lock_test_and_set<mode>"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
!         (match_operand:GPR 1 "memory_operand" "+Z"))
     (set (match_dup 1)
  	(unspec_volatile:GPR
  	  [(match_operand:GPR 2 "reg_or_short_operand" "rL")]


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