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Re: [patch x86] use always_inline on all vector intrinsics

Daniel Berlin wrote:

I checked 9.0 for you, and nothing is guarded with SSE3 there.

dberlin@linux-009002219098:/opt/intel/cc/9.0/include> grep SSE3 *
pmmintrin.h: * Principal header file for Intel(R) Pentium(R) 4 processor
SSE3 intrinsics


Looking at the PR21408, it looks that curent gcc's version of pmmintrin.h improperly guards a couple of defines to be available ony when SSE3 is enabled. From the PR:

In GCC's version of pmmintrin.h we have:
#ifdef __SSE3__
#include <xmmintrin.h>
#include <emmintrin.h>

/* Additional bits in the MXCSR.  */
#define _MM_DENORMALS_ZERO_MASK		0x0040
#define _MM_DENORMALS_ZERO_ON		0x0040
#define _MM_DENORMALS_ZERO_OFF		0x0000

 _mm_setcsr ((_mm_getcsr () & ~_MM_DENORMALS_ZERO_MASK) | (mode))
 (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)

... and then SSE3 intrinsics.

But those addtionnal MXCSR bits can be found, for example, on a k8 with only SSE2.
Side note: they aren't guarded this way either in Intel headers.

If I understand correctly, by including <pmmintrin.h>, those #defines should be visible, even if no __SSE3__ is defined. I'm CCing the bug reporter, if he can clarify this problem with some more details.


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