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Re: RFC: MIPS clones without lwl/lwr/swl/swr

Marek Michalkiewicz <> writes:
> The patch below (for mainline) is an attempt to support MIPS clones
> which don't have the patented lwl/lwr/swl/swr instructions.  This
> would be useful mainly for the Realtek RTL8181 "Wireless LAN Access
> Point / Gateway Controller", based on the Lexra core.  Linux/uClibc
> port for the RTL8181 is available at .
> This is not tested (other than it compiles), so not meant for
> inclusion in the official GCC source just yet - but I kindly ask
> you (especially MIPS hackers, because I'm not yet very familiar
> with this architecture) to review it and tell me if it looks good.

Looks good to me.

The MIPS port usually guards this sort of instruction selection with an
ISA_HAS_* macro (ISA_HAS_COND_TRAP, ISA_HAS_CLZ_CLO, etc.).  One thing
I'd like to see is a new ISA_HAS_* macro to say whether lwl/lwr,
etc. are available.  The macro would be false if your new option is
passed and would also be false for TARGET_MIPS16.  If at some point
in the future, -march is extended to support a processor without the
patented instructions, the macro would be false when generating code
for that processor.

> Suggestions for a better name for this option are also welcome.

I've no strong opinions about that, but I don't see any need to
shorten "patent-free" to "patfree".


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