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[committed] Tweak RM7000 scheduler after imul3 changes
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 11 May 2005 21:13:48 +0100
- Subject: [committed] Tweak RM7000 scheduler after imul3 changes
As discussed earlier, it probably makes sense to tweak the RM7000
scheduler so that it uses the new imul3 attribute instead of the
hilo_operand check. The patch below does this, and also removes
hilo_operand, which was only used by 7000.md.
I checked that this patch has no effect on the output of gcc.c-torture
and gcc.dg for:
-O2 -march=rm7000 -fno-schedule-insns -fschedule-insns2
(i.e. with only the post-reload scheduler enabled). The output with
both schedulers enabled was different for 7 files, but by my reckoning,
the before and after versions were equally good.
The patch should theoretically give better pre-reload schedules for the
highpart multiplication patterns. The scheduler used to use the non-hilo
reservation before reload because the destination would not satisfy
hilo_operand. It will now use the "hilo" version instead. All 7 of
the changes I mentioned were related to these patterns.
Applied to mainline.
Richard
* config/mips/7000.md (rm7_impy_si_mult): Just match imul and imadd.
Remove hilo_operand check.
(rm7_impy_si_mul): Just match imul3. Remove hilo_operand check.
* config/mips/predicates.md (hilo_operand): Delete.
Index: config/mips/7000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/7000.md,v
retrieving revision 1.10
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.10 7000.md
--- config/mips/7000.md 11 May 2005 19:02:35 -0000 1.10
+++ config/mips/7000.md 11 May 2005 19:47:49 -0000
@@ -115,17 +115,15 @@ (define_insn_reservation "rm7_idiv_di" 6
(define_insn_reservation "rm7_impy_si_mult" 5
(and (eq_attr "cpu" "r7000")
- (and (eq_attr "type" "imul,imul3,imadd")
- (and (eq_attr "mode" "SI")
- (match_operand 0 "hilo_operand"))))
+ (and (eq_attr "type" "imul,imadd")
+ (eq_attr "mode" "SI")))
"rm7_impydiv+(rm7_impydiv_iter*3)")
;; There are an additional 2 stall cycles.
(define_insn_reservation "rm7_impy_si_mul" 2
(and (eq_attr "cpu" "r7000")
- (and (eq_attr "type" "imul,imul3,imadd")
- (and (eq_attr "mode" "SI")
- (not (match_operand 0 "hilo_operand")))))
+ (and (eq_attr "type" "imul3")
+ (eq_attr "mode" "SI")))
"rm7_impydiv")
(define_insn_reservation "rm7_impy_di" 9
Index: config/mips/predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/predicates.md,v
retrieving revision 1.3
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.3 predicates.md
--- config/mips/predicates.md 29 Aug 2004 09:19:34 -0000 1.3
+++ config/mips/predicates.md 11 May 2005 19:47:49 -0000
@@ -69,10 +69,6 @@ (define_predicate "fpr_operand"
(and (match_code "reg")
(match_test "FP_REG_P (REGNO (op))")))
-(define_predicate "hilo_operand"
- (and (match_code "reg")
- (match_test "MD_REG_P (REGNO (op))")))
-
(define_predicate "lo_operand"
(and (match_code "reg")
(match_test "REGNO (op) == LO_REGNUM")))