This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: PATCH: ARM VFP test
- From: Richard Earnshaw <rearnsha at gcc dot gnu dot org>
- To: Mark Mitchell <mark at codesourcery dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 11 May 2005 11:16:09 +0100
- Subject: Re: PATCH: ARM VFP test
- References: <200504221806.j3MI67iZ009551@sirius.codesourcery.com> <1114607218.2729.33.camel@pc960.cambridge.arm.com> <4280EB5C.3030203@codesourcery.com> <1115801778.25012.8.camel@pc960.cambridge.arm.com>
On Wed, 2005-05-11 at 09:56, Richard Earnshaw wrote:
> On Tue, 2005-05-10 at 18:11, Mark Mitchell wrote:
> > That didn't work, actually -- the compiler seems rather determined to
> > use integer registers. I gave up, and went with the attached patch.
> So it turns out the test has unveiled a bug...
>
> (define_expand "negsf2"
> [(set (match_operand:SF 0 "s_register_operand" "")
> (neg:SF (match_operand:SF 1 "s_register_operand" "")))]
> "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
> ""
> )
>
> (define_expand "negdf2"
> [(set (match_operand:DF 0 "s_register_operand" "")
> (neg:DF (match_operand:DF 1 "s_register_operand" "")))]
> "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
> "")
>
> Neither of the above patterns should be restricted to the FPA. We have
> patterns for this on the VFP and should be using them. It's odd that
> for negdf2 we still manage to generate the correct instruction, but for
> negsf we fail. Must be combine (or CSE) somehow generating the pattern
> through substitution of equivalents.
Fixed with:
2005-05-11 Richard Earnshaw <richard.earnshaw@arm.com>
* arm.md (negsf2, negdf2): Permit these expands when compiling for VFP.
testsuite:
2005-05-11 Richard Earnshaw <richard.earnshaw@arm.com>
* gcc.dg/arm-vfp1.c: Revert last change.
Tested on arm-elf by visual inspection of assembler and running the
gcc.dg subsuite tests.
R.