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Re: PATCH: ARM VFP test


On Tue, 2005-05-10 at 18:11, Mark Mitchell wrote:
> Richard Earnshaw wrote:
> 
> >>+   /* negsf2_vfp */
> >>+   /* { dg-final { scan-assembler "fnegs" } } */
> >>+   f1 = -f1;
> > 
> > 
> > This generates a failure on all the machines I've tried, because the
> > compiler does this with integer registers and logical operations (it's
> > cheaper that way).
> > 
> > I think changing the test to something more complex but requiring a
> > fnegs would fix it (something like -(f1 + f2)), but I haven't tried it
> > yet.
> 
> That didn't work, actually -- the compiler seems rather determined to 
> use integer registers.  I gave up, and went with the attached patch.

Thanks for looking at this.

So it turns out the test has unveiled a bug...

(define_expand "negsf2"
  [(set (match_operand:SF         0 "s_register_operand" "")
        (neg:SF (match_operand:SF 1 "s_register_operand" "")))]
  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
  ""
)

(define_expand "negdf2"
  [(set (match_operand:DF         0 "s_register_operand" "")
        (neg:DF (match_operand:DF 1 "s_register_operand" "")))]
  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
  "")

Neither of the above patterns should be restricted to the FPA.  We have
patterns for this on the VFP and should be using them.  It's odd that
for negdf2 we still manage to generate the correct instruction, but for
negsf we fail.  Must be combine (or CSE) somehow generating the pattern
through substitution of equivalents.

R.


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