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Re: [s390] patch: add support for 'lzdr' and 'lzer'


Hi,

this patch adds backend support for the move of a floating point zero into a
floating point register.  The constraint letter 'G' is introduced for
a floating point zero constant.  CONST_DOUBLE_OK_FOR_CONSTRAINT_P now points to
s390_const_double_ok_for_constraint_p to check that.  Additional lines in
legitimate_reload_constant_p tell reload not to handle this case.

Bootstrapped and regtested on mainline for s390 and s390x. Ok to apply?


2005-05-09  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.c: (s390_const_double_ok_for_constraint_p): New
	function.
	(legitimate_reload_constant_p): Add check for const double zero.
	* config/s390/s390.md: Add comment for constraint letter 'G'.
	("*movdf_64", "*movdf_31", "movsf"): Add constraint and proper
	attributes for new case.
	* config/s390/s390.h: (CONST_DOUBLE_OK_FOR_CONSTRAINT_P): Define it as
	s390_const_double_ok_for_constraint_p.
	* config/s390/s390-protos.h: Declare external
	s390_const_double_ok_for_constraint_p.


Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig	2005-05-04 18:16:22.031486453 +0200
--- gcc/config/s390/s390.c	2005-05-04 18:16:29.401486453 +0200
*************** s390_extra_constraint_str (rtx op, int c
*** 1680,1685 ****
--- 1680,1706 ----
  /* Return true if VALUE matches the constraint STR.  */
  
  int
+ s390_const_double_ok_for_constraint_p (rtx value,
+ 				       int c,
+ 				       const char * str)
+ {
+   gcc_assert (c == str[0]);
+ 
+   switch (str[0])
+     {
+     case 'G':
+       /* The floating point zero constant.  */
+       return (GET_MODE_CLASS (GET_MODE (value)) == MODE_FLOAT
+               && value == CONST0_RTX (GET_MODE (value)));
+       
+     default:
+       return 0;
+     }
+ }
+ 
+ /* Return true if VALUE matches the constraint STR.  */
+ 
+ int
  s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
  				int c,
  				const char * str)
*************** legitimate_reload_constant_p (rtx op)
*** 2190,2195 ****
--- 2211,2221 ----
        && larl_operand (op, VOIDmode))
      return true;
  
+   /* Accept lzXX operands.  */
+   if (GET_CODE (op) == CONST_DOUBLE
+       && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, 'G', "G"))
+     return true;
+ 
    /* Everything else cannot be handled without reload.  */
    return false;
  }
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig	2005-05-04 18:16:25.251486453 +0200
--- gcc/config/s390/s390.md	2005-05-04 18:16:29.411486453 +0200
***************
*** 29,34 ****
--- 29,35 ----
  ;;    d -- Any register from 0 to 15.
  ;;    f -- Floating point registers.
  ;;    t -- Access registers 36 and 37.
+ ;;    G -- Const double zero operand
  ;;    I -- An 8-bit constant (0..255).
  ;;    J -- A 12-bit constant (0..4095).
  ;;    K -- A 16-bit constant (-32768..32767).
***************
*** 1364,1373 ****
    "")
  
  (define_insn "*movdf_64"
!   [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,m,?Q")
!         (match_operand:DF 1 "general_operand" "f,R,T,f,f,d,m,d,?Q"))]
    "TARGET_64BIT"
    "@
     ldr\t%0,%1
     ld\t%0,%1
     ldy\t%0,%1
--- 1365,1375 ----
    "")
  
  (define_insn "*movdf_64"
!   [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,d,m,?Q")
!         (match_operand:DF 1 "general_operand" "G,f,R,T,f,f,d,m,d,?Q"))]
    "TARGET_64BIT"
    "@
+    lzdr\t%0
     ldr\t%0,%1
     ld\t%0,%1
     ldy\t%0,%1
***************
*** 1377,1390 ****
     lg\t%0,%1
     stg\t%1,%0
     #"
!   [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY,SS")
!    (set_attr "type" "floaddf,floaddf,floaddf,fstoredf,fstoredf,lr,load,store,*")])
  
  (define_insn "*movdf_31"
!   [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,Q,d,o,Q")
!         (match_operand:DF 1 "general_operand" "f,R,T,f,f,Q,d,dKm,d,Q"))]
    "!TARGET_64BIT"
    "@
     ldr\t%0,%1
     ld\t%0,%1
     ldy\t%0,%1
--- 1379,1393 ----
     lg\t%0,%1
     stg\t%1,%0
     #"
!   [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY,SS")
!    (set_attr "type" "floaddf,floaddf,floaddf,floaddf,fstoredf,fstoredf,lr,load,store,*")])
  
  (define_insn "*movdf_31"
!   [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,Q,d,o,Q")
!         (match_operand:DF 1 "general_operand" "G,f,R,T,f,f,Q,d,dKm,d,Q"))]
    "!TARGET_64BIT"
    "@
+    lzdr\t%0
     ldr\t%0,%1
     ld\t%0,%1
     ldy\t%0,%1
***************
*** 1395,1402 ****
     #
     #
     #"
!   [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RS,RS,*,*,SS")
!    (set_attr "type" "floaddf,floaddf,floaddf,fstoredf,fstoredf,lm,stm,*,*,*")])
  
  (define_split
    [(set (match_operand:DF 0 "nonimmediate_operand" "")
--- 1398,1405 ----
     #
     #
     #"
!   [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RS,*,*,SS")
!    (set_attr "type" "floaddf,floaddf,floaddf,floaddf,fstoredf,fstoredf,lm,stm,*,*,*")])
  
  (define_split
    [(set (match_operand:DF 0 "nonimmediate_operand" "")
***************
*** 1457,1466 ****
  ;
  
  (define_insn "movsf"
!   [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,d,R,T,?Q")
!         (match_operand:SF 1 "general_operand" "f,R,T,f,f,d,R,T,d,d,?Q"))]
    ""
    "@
     ler\t%0,%1
     le\t%0,%1
     ley\t%0,%1
--- 1460,1470 ----
  ;
  
  (define_insn "movsf"
!   [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,d,d,R,T,?Q")
!         (match_operand:SF 1 "general_operand" "G,f,R,T,f,f,d,R,T,d,d,?Q"))]
    ""
    "@
+    lzer\t%0
     ler\t%0,%1
     le\t%0,%1
     ley\t%0,%1
***************
*** 1472,1479 ****
     st\t%1,%0
     sty\t%1,%0
     #"
!   [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY,SS")
!    (set_attr "type" "floadsf,floadsf,floadsf,fstoresf,fstoresf,
                       lr,load,load,store,store,*")])
  
  ;
--- 1476,1483 ----
     st\t%1,%0
     sty\t%1,%0
     #"
!   [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY,SS")
!    (set_attr "type" "floadsf,floadsf,floadsf,floadsf,fstoresf,fstoresf,
                       lr,load,load,store,store,*")])
  
  ;
Index: gcc/config/s390/s390.h
===================================================================
*** gcc/config/s390/s390.h.orig	2005-05-04 18:15:40.621486453 +0200
--- gcc/config/s390/s390.h	2005-05-04 18:16:29.411486453 +0200
*************** extern const enum reg_class regclass_map
*** 485,491 ****
  #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
    s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
  
! #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)  1
  
  #define EXTRA_CONSTRAINT_STR(OP, C, STR)                               	\
    s390_extra_constraint_str ((OP), (C), (STR))
--- 485,492 ----
  #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
    s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
  
! #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)			\
!   s390_const_double_ok_for_constraint_p ((VALUE), (C), (STR))
  
  #define EXTRA_CONSTRAINT_STR(OP, C, STR)                               	\
    s390_extra_constraint_str ((OP), (C), (STR))
Index: gcc/config/s390/s390-protos.h
===================================================================
*** gcc/config/s390/s390-protos.h.orig	2005-05-04 18:15:46.661486453 +0200
--- gcc/config/s390/s390-protos.h	2005-05-04 18:16:29.411486453 +0200
*************** extern void s390_conditional_register_us
*** 33,38 ****
--- 33,39 ----
  #ifdef RTX_CODE
  extern int s390_extra_constraint_str (rtx, int, const char *);
  extern int s390_const_ok_for_constraint_p (HOST_WIDE_INT, int, const char *);
+ extern int s390_const_double_ok_for_constraint_p (rtx, int, const char *);
  extern int s390_single_part (rtx, enum machine_mode, enum machine_mode, int);
  extern unsigned HOST_WIDE_INT s390_extract_part (rtx, enum machine_mode, int);
  extern bool s390_split_ok_p (rtx, rtx, enum machine_mode, int);


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