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Re: [s390] macros patch 10/11
- From: Adrian Straetling <straetling at ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Ulrich dot Weigand at de dot ibm dot com
- Date: Mon, 9 May 2005 17:30:48 +0200
- Subject: Re: [s390] macros patch 10/11
- References: <20050509151411.GA11469@de.ibm.com>
Hi,
Here is the tenth patch. It combines several trunc patterns using real_2expN to
replace string->real conversion.
2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md: ("gf") New mode attribute.
("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2",
"fixuns_truncsfsi2"): Merge.
("fix_truncdfdi2", "fix_truncsfdi2"): Merge.
("fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", "fix_truncsfdi2_ieee",
"fix_truncsfsi2_ieee"): Merge.
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig 2005-05-04 18:15:34.851486453 +0200
--- gcc/config/s390/s390.md 2005-05-04 18:15:37.461486453 +0200
***************
*** 292,297 ****
--- 292,301 ----
;; and "lcr" in SImode.
(define_mode_attr g [(DI "g") (SI "")])
+ ;; In GPR templates, a string like "c<gf>dbr" will expand to "cgdbr in DImode
+ ;; and "cfdbr" in SImode.
+ (define_mode_attr gf [(DI "g") (SI "f")])
+
;; ICM mask required to load MODE value into the highest subreg
;; of a SImode register.
(define_mode_attr icm_hi [(HI "12") (QI "8")])
***************
*** 2667,2751 ****
;
! ; fixuns_truncdfdi2 and fix_truncdfsi2 instruction pattern(s).
;
! (define_expand "fixuns_truncdfdi2"
! [(set (match_operand:DI 0 "register_operand" "")
! (unsigned_fix:DI (match_operand:DF 1 "register_operand" "")))]
! "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
{
rtx label1 = gen_label_rtx ();
rtx label2 = gen_label_rtx ();
! rtx temp = gen_reg_rtx (DFmode);
! operands[1] = force_reg (DFmode, operands[1]);
!
! emit_insn (gen_cmpdf (operands[1],
! CONST_DOUBLE_FROM_REAL_VALUE (
! REAL_VALUE_ATOF ("9223372036854775808.0", DFmode), DFmode)));
emit_jump_insn (gen_blt (label1));
! emit_insn (gen_subdf3 (temp, operands[1],
! CONST_DOUBLE_FROM_REAL_VALUE (
! REAL_VALUE_ATOF ("18446744073709551616.0", DFmode), DFmode)));
! emit_insn (gen_fix_truncdfdi2_ieee (operands[0], temp, GEN_INT(7)));
emit_jump (label2);
emit_label (label1);
! emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
emit_label (label2);
DONE;
})
! (define_expand "fix_truncdfdi2"
[(set (match_operand:DI 0 "register_operand" "")
! (fix:DI (match_operand:DF 1 "nonimmediate_operand" "")))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
{
! operands[1] = force_reg (DFmode, operands[1]);
! emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
DONE;
})
! (define_insn "fix_truncdfdi2_ieee"
! [(set (match_operand:DI 0 "register_operand" "=d")
! (fix:DI (match_operand:DF 1 "register_operand" "f")))
! (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))]
! "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
! "cgdbr\t%0,%h2,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "ftoi")])
;
! ; fixuns_truncdfsi2 and fix_truncdfsi2 instruction pattern(s).
;
- (define_expand "fixuns_truncdfsi2"
- [(set (match_operand:SI 0 "register_operand" "")
- (unsigned_fix:SI (match_operand:DF 1 "register_operand" "")))]
- "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- {
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
- rtx temp = gen_reg_rtx (DFmode);
-
- operands[1] = force_reg (DFmode,operands[1]);
- emit_insn (gen_cmpdf (operands[1],
- CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF ("2147483648.0", DFmode), DFmode)));
- emit_jump_insn (gen_blt (label1));
- emit_insn (gen_subdf3 (temp, operands[1],
- CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF ("4294967296.0", DFmode), DFmode)));
- emit_insn (gen_fix_truncdfsi2_ieee (operands[0], temp, GEN_INT (7)));
- emit_jump (label2);
-
- emit_label (label1);
- emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5)));
- emit_label (label2);
- DONE;
- })
-
(define_expand "fix_truncdfsi2"
[(set (match_operand:SI 0 "register_operand" "")
(fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))]
--- 2671,2734 ----
;
! ; fixuns_trunc(sf|df)(si|di)2 and fix_trunc(sf|df)(si|di)2 instruction pattern(s).
;
! (define_expand "fixuns_trunc<FPR:mode><GPR:mode>2"
! [(set (match_operand:GPR 0 "register_operand" "")
! (unsigned_fix:GPR (match_operand:FPR 1 "register_operand" "")))]
! "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
{
rtx label1 = gen_label_rtx ();
rtx label2 = gen_label_rtx ();
! rtx temp = gen_reg_rtx (<FPR:MODE>mode);
! REAL_VALUE_TYPE cmp, sub;
!
! operands[1] = force_reg (<FPR:MODE>mode, operands[1]);
! real_2expN (&cmp, GET_MODE_BITSIZE(<GPR:MODE>mode) - 1);
! real_2expN (&sub, GET_MODE_BITSIZE(<GPR:MODE>mode));
!
! emit_insn (gen_cmp<FPR:mode> (operands[1],
! CONST_DOUBLE_FROM_REAL_VALUE (cmp, <FPR:MODE>mode)));
emit_jump_insn (gen_blt (label1));
! emit_insn (gen_sub<FPR:mode>3 (temp, operands[1],
! CONST_DOUBLE_FROM_REAL_VALUE (sub, <FPR:MODE>mode)));
! emit_insn (gen_fix_trunc<FPR:mode><GPR:mode>2_ieee (operands[0], temp,
! GEN_INT(7)));
emit_jump (label2);
emit_label (label1);
! emit_insn (gen_fix_trunc<FPR:mode><GPR:mode>2_ieee (operands[0],
! operands[1], GEN_INT(5)));
emit_label (label2);
DONE;
})
! (define_expand "fix_trunc<FPR:mode>di2"
[(set (match_operand:DI 0 "register_operand" "")
! (fix:DI (match_operand:FPR 1 "nonimmediate_operand" "")))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
{
! operands[1] = force_reg (<FPR:MODE>mode, operands[1]);
! emit_insn (gen_fix_trunc<FPR:mode>di2_ieee (operands[0], operands[1],
! GEN_INT(5)));
DONE;
})
! (define_insn "fix_trunc<FPR:mode><GPR:mode>2_ieee"
! [(set (match_operand:GPR 0 "register_operand" "=d")
! (fix:GPR (match_operand:FPR 1 "register_operand" "f")))
! (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))]
! "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
! "c<GPR:gf><FPR:de>br\t%0,%h2,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "ftoi")])
;
! ; fix_truncdfsi2 instruction pattern(s).
;
(define_expand "fix_truncdfsi2"
[(set (match_operand:SI 0 "register_operand" "")
(fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))]
***************
*** 2772,2787 ****
DONE;
})
- (define_insn "fix_truncdfsi2_ieee"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (fix:SI (match_operand:DF 1 "register_operand" "f")))
- (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND)
- (clobber (reg:CC 33))]
- "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "cfdbr\t%0,%h2,%1"
- [(set_attr "op_type" "RRE")
- (set_attr "type" "ftoi")])
-
(define_insn "fix_truncdfsi2_ibm"
[(set (match_operand:SI 0 "register_operand" "=d")
(fix:SI (match_operand:DF 1 "nonimmediate_operand" "+f")))
--- 2755,2760 ----
***************
*** 2800,2885 ****
[(set_attr "length" "20")])
;
! ; fixuns_truncsfdi2 and fix_truncsfdi2 instruction pattern(s).
;
- (define_expand "fixuns_truncsfdi2"
- [(set (match_operand:DI 0 "register_operand" "")
- (unsigned_fix:DI (match_operand:SF 1 "register_operand" "")))]
- "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- {
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
- rtx temp = gen_reg_rtx (SFmode);
-
- operands[1] = force_reg (SFmode, operands[1]);
- emit_insn (gen_cmpsf (operands[1],
- CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF ("9223372036854775808.0", SFmode), SFmode)));
- emit_jump_insn (gen_blt (label1));
-
- emit_insn (gen_subsf3 (temp, operands[1],
- CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF ("18446744073709551616.0", SFmode), SFmode)));
- emit_insn (gen_fix_truncsfdi2_ieee (operands[0], temp, GEN_INT(7)));
- emit_jump (label2);
-
- emit_label (label1);
- emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
- emit_label (label2);
- DONE;
- })
-
- (define_expand "fix_truncsfdi2"
- [(set (match_operand:DI 0 "register_operand" "")
- (fix:DI (match_operand:SF 1 "nonimmediate_operand" "")))]
- "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- {
- operands[1] = force_reg (SFmode, operands[1]);
- emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
- DONE;
- })
-
- (define_insn "fix_truncsfdi2_ieee"
- [(set (match_operand:DI 0 "register_operand" "=d")
- (fix:DI (match_operand:SF 1 "register_operand" "f")))
- (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
- (clobber (reg:CC 33))]
- "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "cgebr\t%0,%h2,%1"
- [(set_attr "op_type" "RRE")
- (set_attr "type" "ftoi")])
-
- ;
- ; fixuns_truncsfsi2 and fix_truncsfsi2 instruction pattern(s).
- ;
-
- (define_expand "fixuns_truncsfsi2"
- [(set (match_operand:SI 0 "register_operand" "")
- (unsigned_fix:SI (match_operand:SF 1 "register_operand" "")))]
- "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- {
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
- rtx temp = gen_reg_rtx (SFmode);
-
- operands[1] = force_reg (SFmode, operands[1]);
- emit_insn (gen_cmpsf (operands[1],
- CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF ("2147483648.0", SFmode), SFmode)));
- emit_jump_insn (gen_blt (label1));
- emit_insn (gen_subsf3 (temp, operands[1],
- CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF ("4294967296.0", SFmode), SFmode)));
- emit_insn (gen_fix_truncsfsi2_ieee (operands[0], temp, GEN_INT (7)));
- emit_jump (label2);
-
- emit_label (label1);
- emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5)));
- emit_label (label2);
- DONE;
- })
-
(define_expand "fix_truncsfsi2"
[(set (match_operand:SI 0 "register_operand" "")
(fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))]
--- 2773,2781 ----
[(set_attr "length" "20")])
;
! ; fix_truncsfsi2 instruction pattern(s).
;
(define_expand "fix_truncsfsi2"
[(set (match_operand:SI 0 "register_operand" "")
(fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))]
***************
*** 2901,2916 ****
DONE;
})
- (define_insn "fix_truncsfsi2_ieee"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (fix:SI (match_operand:SF 1 "register_operand" "f")))
- (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND)
- (clobber (reg:CC 33))]
- "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "cfebr\t%0,%h2,%1"
- [(set_attr "op_type" "RRE")
- (set_attr "type" "ftoi")])
-
;
; floatdi(df|sf)2 instruction pattern(s).
;
--- 2797,2802 ----