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[patch] gcc/*: Fix comment typos.


Hi,

Committed as obvious.

Kazu Hirata

2005-05-07  Kazu Hirata  <kazu@cs.umass.edu>

	* tree-ssa-loop-ivcanon.c, config/i386/i386.c,
	config/rs6000/rs6000.h: Fix comment typos.

Index: tree-ssa-loop-ivcanon.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-ssa-loop-ivcanon.c,v
retrieving revision 2.12
diff -u -d -p -r2.12 tree-ssa-loop-ivcanon.c
--- tree-ssa-loop-ivcanon.c	6 May 2005 21:11:29 -0000	2.12
+++ tree-ssa-loop-ivcanon.c	7 May 2005 14:37:27 -0000
@@ -59,7 +59,7 @@ Software Foundation, 59 Temple Place - S
 
 enum unroll_level
 {
-  UL_SINGLE_ITER,	/* Only loops that exit immediatelly in the first
+  UL_SINGLE_ITER,	/* Only loops that exit immediately in the first
 			   iteration.  */
   UL_NO_GROWTH,		/* Only loops whose unrolling will not cause increase
 			   of code size.  */
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.819
diff -u -d -p -r1.819 i386.c
--- config/i386/i386.c	6 May 2005 19:31:13 -0000	1.819
+++ config/i386/i386.c	7 May 2005 14:37:29 -0000
@@ -11291,7 +11291,7 @@ ix86_expand_movmem (rtx dst, rtx src, rt
      count / 4 + (count & 3), the other sequence is either 4 or 7 bytes,
      but we don't know whether upper 24 (resp. 56) bits of %ecx will be
      known to be zero or not.  The rep; movsb sequence causes higher
-     register preasure though, so take that into account.  */
+     register pressure though, so take that into account.  */
 
   if ((!optimize || optimize_size)
       && (count == 0
Index: config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.363
diff -u -d -p -r1.363 rs6000.h
--- config/rs6000/rs6000.h	5 May 2005 20:54:25 -0000	1.363
+++ config/rs6000/rs6000.h	7 May 2005 14:37:30 -0000
@@ -128,7 +128,7 @@
 
 /* Architecture type.  */
 
-/* Define TARGET_MFCRF if the target assembler does not suppport the
+/* Define TARGET_MFCRF if the target assembler does not support the
    optional field operand for mfcr.  */
 
 #ifndef HAVE_AS_MFCRF


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