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Assertify m68k
- From: Nathan Sidwell <nathan at codesourcery dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Jeffrey A Law <law at redhat dot com>
- Date: Fri, 29 Apr 2005 10:14:30 +0100
- Subject: Assertify m68k
Hi,
this patch assertifies m68k. I built an i86 hosted cross compiler and
used it to build newlib (both with and without checking). gdb & dejagnu
don't appear to contain an m68k simulator or baseboard for it, so I
couldn't test further.
Is anybody able to perform more robust testing, or is it ok as-is?
nathan
--
Nathan Sidwell :: http://www.codesourcery.com :: CodeSourcery LLC
nathan@codesourcery.com :: http://www.planetfall.pwp.blueyonder.co.uk
2005-04-29 Nathan Sidwell <nathan@codesourcery.com>
* config/m68k/m68k.c (m68k_initial_elimination_offset): Use
gcc_assert and gcc_unreachable as appropriate.
(output_dbcc_and_branch, output_scc_di, legitimize_pic_address,
const_int_cost, output_move_const_into_data_reg,
output_move_qimode, output_move_double, find_addr_reg,
print_operand, print_operand_address): Likewise.
* config/m68k/m68k.md (adddi3, subdi3, negsf2, negdf2, abssf2,
absdf2, sordered, sunordered, suneq, sunge, sungt, sunle, sunlt,
sltgt, bordered, bunordered, buneq, bunge, bungt, bunle, bunlt,
bltgt, *bordered_rev, *bunordered_rev, *buneq_rev, *bunge_rev,
*bunle_rev, *bunlt_rev, *bltgt_rev, negxf2, absxf2,
conditional_trap): Likewise.
* config/m68k/m68kelf.h (ASM_OUTPUT_ALIGN): Remove unreachable code.
Index: config/m68k/m68k.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68k/m68k.c,v
retrieving revision 1.148
diff -c -3 -p -r1.148 m68k.c
*** config/m68k/m68k.c 23 Apr 2005 21:28:28 -0000 1.148
--- config/m68k/m68k.c 29 Apr 2005 08:46:00 -0000
*************** m68k_initial_elimination_offset (int fro
*** 442,453 ****
m68k_compute_frame_layout ();
! if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
! return current_frame.offset + current_frame.size + (frame_pointer_needed ? -UNITS_PER_WORD * 2 : -UNITS_PER_WORD);
! else if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
! return current_frame.offset + current_frame.size;
!
! abort();
}
/* Refer to the array `regs_ever_live' to determine which registers
--- 442,458 ----
m68k_compute_frame_layout ();
! gcc_assert (to == STACK_POINTER_REGNUM);
! switch (from)
! {
! case ARG_POINTER_REGNUM:
! return current_frame.offset + current_frame.size
! + (frame_pointer_needed ? -UNITS_PER_WORD * 2 : -UNITS_PER_WORD);
! case FRAME_POINTER_REGNUM:
! return current_frame.offset + current_frame.size;
! default:
! gcc_unreachable ();
! }
}
/* Refer to the array `regs_ever_live' to determine which registers
*************** output_dbcc_and_branch (rtx *operands)
*** 1147,1153 ****
break;
default:
! abort ();
}
/* If the decrement is to be done in SImode, then we have
--- 1152,1158 ----
break;
default:
! gcc_unreachable ();
}
/* If the decrement is to be done in SImode, then we have
*************** output_dbcc_and_branch (rtx *operands)
*** 1165,1176 ****
break;
default:
! abort ();
}
}
const char *
! output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest)
{
rtx loperands[7];
enum rtx_code op_code = GET_CODE (op);
--- 1170,1181 ----
break;
default:
! gcc_unreachable ();
}
}
const char *
! output_scc_di (rtx op, rtx operand1, rtx operand2, rtx dest)
{
rtx loperands[7];
enum rtx_code op_code = GET_CODE (op);
*************** output_scc_di(rtx op, rtx operand1, rtx
*** 1320,1326 ****
break;
default:
! abort ();
}
return "";
}
--- 1325,1331 ----
break;
default:
! gcc_unreachable ();
}
return "";
}
*************** legitimize_pic_address (rtx orig, enum m
*** 1413,1420 ****
/* First handle a simple SYMBOL_REF or LABEL_REF */
if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF)
{
! if (reg == 0)
! abort ();
pic_ref = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode,
--- 1418,1424 ----
/* First handle a simple SYMBOL_REF or LABEL_REF */
if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF)
{
! gcc_assert (reg);
pic_ref = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode,
*************** legitimize_pic_address (rtx orig, enum m
*** 1433,1449 ****
&& XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
return orig;
! if (reg == 0)
! abort ();
/* legitimize both operands of the PLUS */
! if (GET_CODE (XEXP (orig, 0)) == PLUS)
! {
! base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
! orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
! base == reg ? 0 : reg);
! }
! else abort ();
if (GET_CODE (orig) == CONST_INT)
return plus_constant (base, INTVAL (orig));
--- 1437,1450 ----
&& XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
return orig;
! gcc_assert (reg);
/* legitimize both operands of the PLUS */
! gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
!
! base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
! orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
! base == reg ? 0 : reg);
if (GET_CODE (orig) == CONST_INT)
return plus_constant (base, INTVAL (orig));
*************** const_int_cost (rtx constant)
*** 1523,1529 ****
case MOVL :
return 2;
default :
! abort ();
}
}
--- 1524,1530 ----
case MOVL :
return 2;
default :
! gcc_unreachable ();
}
}
*************** output_move_const_into_data_reg (rtx *op
*** 1685,1691 ****
case MOVL :
return "move%.l %1,%0";
default :
! abort ();
}
}
--- 1686,1692 ----
case MOVL :
return "move%.l %1,%0";
default :
! gcc_unreachable ();
}
}
*************** output_move_qimode (rtx *operands)
*** 1819,1831 ****
{
/* 68k family always modifies the stack pointer by at least 2, even for
byte pushes. The 5200 (ColdFire) does not do this. */
! if (GET_CODE (operands[0]) == MEM
! && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
! && XEXP (XEXP (operands[0], 0), 0) == stack_pointer_rtx
! && ! ADDRESS_REG_P (operands[1])
! && ! TARGET_COLDFIRE)
! /* generated by pushqi1 pattern now */
! abort ();
/* clr and st insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
--- 1820,1832 ----
{
/* 68k family always modifies the stack pointer by at least 2, even for
byte pushes. The 5200 (ColdFire) does not do this. */
!
! /* This case is generated by pushqi1 pattern now */
! gcc_assert (!(GET_CODE (operands[0]) == MEM
! && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
! && XEXP (XEXP (operands[0], 0), 0) == stack_pointer_rtx
! && ! ADDRESS_REG_P (operands[1])
! && ! TARGET_COLDFIRE));
/* clr and st insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
*************** output_move_double (rtx *operands)
*** 1947,1958 ****
else
optype1 = RNDOP;
! /* Check for the cases that the operand constraints are not
! supposed to allow to happen. Abort if we get one,
! because generating code for these cases is painful. */
!
! if (optype0 == RNDOP || optype1 == RNDOP)
! abort ();
/* If one operand is decrementing and one is incrementing
decrement the former register explicitly
--- 1948,1957 ----
else
optype1 = RNDOP;
! /* Check for the cases that the operand constraints are not supposed
! to allow to happen. Generating code for these cases is
! painful. */
! gcc_assert (optype0 != RNDOP && optype1 != RNDOP);
/* If one operand is decrementing and one is incrementing
decrement the former register explicitly
*************** output_move_double (rtx *operands)
*** 2048,2062 ****
middlehalf[1] = GEN_INT (l[1]);
latehalf[1] = GEN_INT (l[2]);
}
! else if (CONSTANT_P (operands[1]))
{
! /* actually, no non-CONST_DOUBLE constant should ever
! appear here. */
! abort ();
! if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 0)
! latehalf[1] = constm1_rtx;
! else
! latehalf[1] = const0_rtx;
}
}
else
--- 2047,2057 ----
middlehalf[1] = GEN_INT (l[1]);
latehalf[1] = GEN_INT (l[2]);
}
! else
{
! /* No non-CONST_DOUBLE constant should ever appear
! here. */
! gcc_assert (!CONSTANT_P (operands[1]));
}
}
else
*************** output_move_double (rtx *operands)
*** 2109,2115 ****
/* If both halves of dest are used in the src memory address,
compute the address into latehalf of dest.
Note that this can't happen if the dest is two data regs. */
! compadr:
xops[0] = latehalf[0];
xops[1] = XEXP (operands[1], 0);
output_asm_insn ("lea %a1,%0", xops);
--- 2104,2110 ----
/* If both halves of dest are used in the src memory address,
compute the address into latehalf of dest.
Note that this can't happen if the dest is two data regs. */
! compadr:
xops[0] = latehalf[0];
xops[1] = XEXP (operands[1], 0);
output_asm_insn ("lea %a1,%0", xops);
*************** compadr:
*** 2140,2147 ****
goto compadr;
/* JRV says this can't happen: */
! if (addreg0 || addreg1)
! abort ();
/* Only the middle reg conflicts; simply put it last. */
output_asm_insn (singlemove_string (operands), operands);
--- 2135,2141 ----
goto compadr;
/* JRV says this can't happen: */
! gcc_assert (!addreg0 && !addreg1);
/* Only the middle reg conflicts; simply put it last. */
output_asm_insn (singlemove_string (operands), operands);
*************** find_addr_reg (rtx addr)
*** 2267,2277 ****
else if (CONSTANT_P (XEXP (addr, 1)))
addr = XEXP (addr, 0);
else
! abort ();
}
! if (GET_CODE (addr) == REG)
! return addr;
! abort ();
}
/* Output assembler code to perform a 32-bit 3-operand add. */
--- 2261,2270 ----
else if (CONSTANT_P (XEXP (addr, 1)))
addr = XEXP (addr, 0);
else
! gcc_unreachable ();
}
! gcc_assert (GET_CODE (addr) == REG);
! return addr;
}
/* Output assembler code to perform a 32-bit 3-operand add. */
*************** print_operand (FILE *file, rtx op, int l
*** 2667,2675 ****
else if (letter == 'o')
{
/* This is only for direct addresses with TARGET_PCREL */
! if (GET_CODE (op) != MEM || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
! || !TARGET_PCREL)
! abort ();
output_addr_const (file, XEXP (op, 0));
}
else if (GET_CODE (op) == REG)
--- 2660,2668 ----
else if (letter == 'o')
{
/* This is only for direct addresses with TARGET_PCREL */
! gcc_assert (GET_CODE (op) == MEM
! && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
! && TARGET_PCREL);
output_addr_const (file, XEXP (op, 0));
}
else if (GET_CODE (op) == REG)
*************** print_operand_address (FILE *file, rtx a
*** 2856,2865 ****
#endif
if (offset != 0)
{
! if (addr != 0)
! {
! abort ();
! }
addr = offset;
}
if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND
--- 2849,2855 ----
#endif
if (offset != 0)
{
! gcc_assert (!addr);
addr = offset;
}
if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND
*************** print_operand_address (FILE *file, rtx a
*** 2914,2927 ****
if (ireg != 0 || breg != 0)
{
int scale = 1;
! if (breg == 0)
! {
! abort ();
! }
! if (! flag_pic && addr && GET_CODE (addr) == LABEL_REF)
! {
! abort ();
! }
if (MOTOROLA)
{
if (addr != 0)
--- 2904,2913 ----
if (ireg != 0 || breg != 0)
{
int scale = 1;
!
! gcc_assert (breg);
! gcc_assert (flag_pic || !addr || GET_CODE (addr) != LABEL_REF);
!
if (MOTOROLA)
{
if (addr != 0)
Index: config/m68k/m68k.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68k/m68k.md,v
retrieving revision 1.82
diff -c -3 -p -r1.82 m68k.md
*** config/m68k/m68k.md 28 Apr 2005 05:38:40 -0000 1.82
--- config/m68k/m68k.md 29 Apr 2005 08:46:11 -0000
***************
*** 715,721 ****
"!TARGET_COLDFIRE"
"* return output_move_himode (operands);")
! (define_insn ""
[(set (match_operand:HI 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:HI 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE"
--- 715,721 ----
"!TARGET_COLDFIRE"
"* return output_move_himode (operands);")
! (define_insn ""
[(set (match_operand:HI 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:HI 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE"
***************
*** 1778,1785 ****
return "add%.l %1,%R0\;addx%.l %3,%0";
}
}
! else if (GET_CODE (operands[0]) == MEM)
{
if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "add%.l %2,%0\;addx%.l %2,%0";
--- 1778,1786 ----
return "add%.l %1,%R0\;addx%.l %3,%0";
}
}
! else
{
+ gcc_assert (GET_CODE (operands[0]) == MEM);
if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "add%.l %2,%0\;addx%.l %2,%0";
***************
*** 1801,1808 ****
return "add%.l %R2,%1\;move%.l %0,%3\;addx%.l %2,%3\;move%.l %3,%0";
}
}
- else
- abort ();
})
(define_insn "addsi_lshrsi_31"
--- 1802,1807 ----
***************
*** 2254,2261 ****
return "sub%.l %1,%R0\;subx%.l %3,%0";
}
}
! else if (GET_CODE (operands[0]) == MEM)
{
if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "sub%.l %2,%0\;subx%.l %2,%0";
--- 2253,2261 ----
return "sub%.l %1,%R0\;subx%.l %3,%0";
}
}
! else
{
+ gcc_assert (GET_CODE (operands[0]) == MEM);
if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "sub%.l %2,%0\;subx%.l %2,%0";
***************
*** 2277,2284 ****
return "sub%.l %R2,%1\;move%.l %0,%3\;subx%.l %2,%3\;move%.l %3,%0";
}
}
- else
- abort ();
})
(define_insn "subsi3"
--- 2277,2282 ----
***************
*** 3577,3584 ****
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, SFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
! if (result == 0)
! abort ();
if (result != target)
emit_move_insn (result, target);
--- 3575,3581 ----
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, SFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
! gcc_assert (result);
if (result != target)
emit_move_insn (result, target);
***************
*** 3620,3627 ****
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, DFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
! if (result == 0)
! abort ();
if (result != target)
emit_move_insn (result, target);
--- 3617,3623 ----
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, DFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
! gcc_assert (result);
if (result != target)
emit_move_insn (result, target);
***************
*** 3693,3700 ****
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, SFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
! if (result == 0)
! abort ();
if (result != target)
emit_move_insn (result, target);
--- 3689,3695 ----
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, SFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
! gcc_assert (result);
if (result != target)
emit_move_insn (result, target);
***************
*** 3731,3738 ****
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, DFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
! if (result == 0)
! abort ();
if (result != target)
emit_move_insn (result, target);
--- 3726,3732 ----
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, DFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
! gcc_assert (result);
if (result != target)
emit_move_insn (result, target);
***************
*** 5165,5172 ****
(ordered:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5159,5165 ----
(ordered:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5184,5191 ****
(unordered:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5177,5183 ----
(unordered:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5203,5210 ****
(uneq:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5195,5201 ----
(uneq:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5222,5229 ****
(unge:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5213,5219 ----
(unge:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5241,5248 ****
(ungt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5231,5237 ----
(ungt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5260,5267 ****
(unle:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5249,5255 ----
(unle:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5279,5286 ****
(unlt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5267,5273 ----
(unlt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5298,5305 ****
(ltgt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! if (! m68k_last_compare_had_fp_operands)
! abort ();
m68k_last_compare_had_fp_operands = 0;
})
--- 5285,5291 ----
(ltgt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060"
{
! gcc_assert (m68k_last_compare_had_fp_operands);
m68k_last_compare_had_fp_operands = 0;
})
***************
*** 5689,5696 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbor %l0" : "fjor %l0";
})
--- 5675,5681 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbor %l0" : "fjor %l0";
})
***************
*** 5701,5708 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbun %l0" : "fjun %l0";
})
--- 5686,5692 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbun %l0" : "fjun %l0";
})
***************
*** 5713,5720 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbueq %l0" : "fjueq %l0";
})
--- 5697,5703 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbueq %l0" : "fjueq %l0";
})
***************
*** 5725,5732 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbuge %l0" : "fjuge %l0";
})
--- 5708,5714 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbuge %l0" : "fjuge %l0";
})
***************
*** 5737,5744 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbugt %l0" : "fjugt %l0";
})
--- 5719,5725 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbugt %l0" : "fjugt %l0";
})
***************
*** 5749,5756 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbule %l0" : "fjule %l0";
})
--- 5730,5736 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbule %l0" : "fjule %l0";
})
***************
*** 5761,5768 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbult %l0" : "fjult %l0";
})
--- 5741,5747 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbult %l0" : "fjult %l0";
})
***************
*** 5773,5780 ****
(pc)))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbogl %l0" : "fjogl %l0";
})
--- 5752,5758 ----
(pc)))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbogl %l0" : "fjogl %l0";
})
***************
*** 5915,5922 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbun %l0" : "fjun %l0";
})
--- 5893,5899 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbun %l0" : "fjun %l0";
})
***************
*** 5927,5934 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbor %l0" : "fjor %l0";
})
--- 5904,5910 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbor %l0" : "fjor %l0";
})
***************
*** 5939,5946 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbogl %l0" : "fjogl %l0";
})
--- 5915,5921 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbogl %l0" : "fjogl %l0";
})
***************
*** 5951,5958 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbolt %l0" : "fjolt %l0";
})
--- 5926,5932 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbolt %l0" : "fjolt %l0";
})
***************
*** 5963,5970 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbogt %l0" : "fjogt %l0";
})
--- 5937,5943 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbogt %l0" : "fjogt %l0";
})
***************
*** 5975,5982 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fboge %l0" : "fjoge %l0";
})
--- 5948,5954 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fboge %l0" : "fjoge %l0";
})
***************
*** 5987,5994 ****
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! if (!(cc_prev_status.flags & CC_IN_68881))
! abort ();
return MOTOROLA ? "fbueq %l0" : "fjueq %l0";
})
--- 5959,5965 ----
(label_ref (match_operand 0 "" ""))))]
"TARGET_68881"
{
! gcc_assert (cc_prev_status.flags & CC_IN_68881);
return MOTOROLA ? "fbueq %l0" : "fjueq %l0";
})
***************
*** 6947,6954 ****
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, XFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
! if (result == 0)
! abort ();
if (result != target)
emit_move_insn (result, target);
--- 6918,6924 ----
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, XFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
! gcc_assert (result);
if (result != target)
emit_move_insn (result, target);
***************
*** 6992,6999 ****
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, XFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
! if (result == 0)
! abort ();
if (result != target)
emit_move_insn (result, target);
--- 6962,6968 ----
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, XFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
! gcc_assert (result);
if (result != target)
emit_move_insn (result, target);
***************
*** 7106,7111 ****
case GEU: return "trapcc";
case LE: return "traple";
case LEU: return "trapls";
! default: abort();
}
})
--- 7075,7080 ----
case GEU: return "trapcc";
case LE: return "traple";
case LEU: return "trapls";
! default: gcc_unreachable ();
}
})
Index: config/m68k/m68kelf.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68k/m68kelf.h,v
retrieving revision 1.28
diff -c -3 -p -r1.28 m68kelf.h
*** config/m68k/m68kelf.h 14 Sep 2004 04:05:35 -0000 1.28
--- config/m68k/m68kelf.h 29 Apr 2005 08:46:11 -0000
*************** Boston, MA 02111-1307, USA. */
*** 86,93 ****
do { \
if ((LOG) > 0) \
fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \
- else if ((LOG) > 31) \
- abort (); \
} while (0)
/* Use proper assembler syntax for these macros. */
--- 86,91 ----