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Re: PR rtl-optimization/15248 -- semi-latent reload bug
- From: Jeffrey A Law <law at redhat dot com>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Thu, 21 Apr 2005 09:28:02 -0600
- Subject: Re: PR rtl-optimization/15248 -- semi-latent reload bug
- Organization: Red Hat, Inc
- References: <Pine.LNX.4.44.0504201923510.15095-100000@www.eyesopen.com>
- Reply-to: law at redhat dot com
On Wed, 2005-04-20 at 19:45 -0600, Roger Sayle wrote:
> Perhaps you can clear up a confusion of mine that I've had since
> we first ran into this spilling to read-only memory issue, a while
> back.
>
> Isn't it a good thing to equivalence a register to a read-only memory
> address?
If it weren't for the problems we're having in our *implementation*,
yes, absolutely.
> My (perhaps misguided) understanding is that if we equivalence
> a pseudo to such a memory address, then that pseudo always holds the
> equivalenced memory value.
Precisely.
> As the value in read-only memory can never
> change, this makes spilling that pseudo relatively cheap. i.e. the
> register never has to be written to memory, only re-read.
Right.
> For example,
> if a pseudo only ever holds the value of a constant pool entry, when
> register pressure gets to high, the spill can be rematerialized without
> previously writing it to memory.
Right.
>
> Perhaps I'm getting the issues confused, and this bug/fix involves a
> different problem. However, in reload spilling constants and read-only
> memory should be prioritized over other classes of spill.
What you're missing is that when the pseudo doesn't get a hard register,
we must eliminate all assignments to the pseudo as any assignment to the
pseudo will generate a write to a read-only memory location.
What makes that particular problem non-trivial to solve is PARALLELs and
the bookkeeping problems in the reg_equiv_XXX arrays if we have a pseudo
equivalenced to a read-only memory location which was assigned a hard
reg which we later spilled.
Jeff