[patch] gcc/*: Fix comment typos.

[Kazu Hirata <kazu at cs dot umass dot edu>]

Hi,

Committed as obvious.

Kazu Hirata

2005-04-09  Kazu Hirata  <kazu@cs.umass.edu>

	* dominance.c, gthr-win32.h, reg-stack.c, tree-ssa-copy.c,
	tree-ssa-operands.c, tree-ssa.c, tree-vrp.c, varasm.c,
	config/alpha/alpha.c, config/arm/arm.c, config/m32r/m32r.h,
	config/rs6000/predicates.md: Fix comment typos.

Index: dominance.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/dominance.c,v
retrieving revision 1.37
diff -u -d -p -r1.37 dominance.c
--- dominance.c	9 Apr 2005 01:37:22 -0000	1.37
+++ dominance.c	9 Apr 2005 16:39:06 -0000
@@ -30,7 +30,7 @@
 
    The algorithm computes this dominator tree implicitly by computing for
    each block its immediate dominator.  We use tree balancing and path
-   compression, so its the O(e*a(e,v)) variant, where a(e,v) is the very
+   compression, so it's the O(e*a(e,v)) variant, where a(e,v) is the very
    slowly growing functional inverse of the Ackerman function.  */
 
 #include "config.h"
Index: gthr-win32.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/gthr-win32.h,v
retrieving revision 1.26
diff -u -d -p -r1.26 gthr-win32.h
--- gthr-win32.h	25 Sep 2004 14:36:37 -0000	1.26
+++ gthr-win32.h	9 Apr 2005 16:39:06 -0000
@@ -71,7 +71,7 @@ Software Foundation, 59 Temple Place - S
 #ifdef _LIBOBJC
 
 /* This is necessary to prevent windef.h (included from windows.h) from
-   defining it's own BOOL as a typedef.  */
+   defining its own BOOL as a typedef.  */
 #ifndef __OBJC__
 #define __OBJC__
 #endif
Index: reg-stack.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/reg-stack.c,v
retrieving revision 1.175
diff -u -d -p -r1.175 reg-stack.c
--- reg-stack.c	31 Mar 2005 14:59:52 -0000	1.175
+++ reg-stack.c	9 Apr 2005 16:39:09 -0000
@@ -1424,7 +1424,7 @@ subst_stack_regs_pat (rtx insn, stack re
 	    if (pat != PATTERN (insn))
 	      {
 		/* The fix_truncdi_1 pattern wants to be able to allocate
-		   it's own scratch register.  It does this by clobbering
+		   its own scratch register.  It does this by clobbering
 		   an fp reg so that it is assured of an empty reg-stack
 		   register.  If the register is live, kill it now.
 		   Remove the DEAD/UNUSED note so we don't try to kill it
Index: tree-ssa-copy.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-ssa-copy.c,v
retrieving revision 2.24
diff -u -d -p -r2.24 tree-ssa-copy.c
--- tree-ssa-copy.c	9 Apr 2005 01:37:23 -0000	2.24
+++ tree-ssa-copy.c	9 Apr 2005 16:39:09 -0000
@@ -430,7 +430,7 @@ get_last_copy_of (tree var)
 
 
 /* Set FIRST to be the first variable in the copy-of chain for DEST.
-   If DEST's copy-of value or its copy-of chain have changed, return
+   If DEST's copy-of value or its copy-of chain has changed, return
    true.
 
    MEM_REF is the memory reference where FIRST is stored.  This is
Index: tree-ssa-operands.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-ssa-operands.c,v
retrieving revision 2.75
diff -u -d -p -r2.75 tree-ssa-operands.c
--- tree-ssa-operands.c	9 Apr 2005 01:37:24 -0000	2.75
+++ tree-ssa-operands.c	9 Apr 2005 16:39:12 -0000
@@ -67,7 +67,7 @@ Boston, MA 02111-1307, USA.  */
    on each of the 5 operand vectors which have been built up.
 
    If the stmt had a previous operand cache, the finalization routines 
-   attempt to match up the new operands with the old ones.  If its a perfect 
+   attempt to match up the new operands with the old ones.  If it's a perfect 
    match, the old vector is simply reused.  If it isn't a perfect match, then 
    a new vector is created and the new operands are placed there.  For 
    virtual operands, if the previous cache had SSA_NAME version of a 
@@ -473,7 +473,7 @@ correct_use_link (ssa_imm_use_t *ptr, tr
   if (prev)
     {
       bool stmt_mod = true;
-      /* Find the first element which isn't a SAFE iterator, is in a sifferent
+      /* Find the first element which isn't a SAFE iterator, is in a different
 	 stmt, and is not a a modified stmt,  That node is in the correct list,
 	 see if we are too.  */
 
@@ -493,7 +493,7 @@ correct_use_link (ssa_imm_use_t *ptr, tr
 	root = prev->stmt;
       else
 	root = *(prev->use);
-      /* If its the right list, simply return.  */
+      /* If it's the right list, simply return.  */
       if (root == *(ptr->use))
 	return;
     }
Index: tree-ssa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-ssa.c,v
retrieving revision 2.86
diff -u -d -p -r2.86 tree-ssa.c
--- tree-ssa.c	9 Apr 2005 01:37:24 -0000	2.86
+++ tree-ssa.c	9 Apr 2005 16:39:13 -0000
@@ -261,7 +261,7 @@ verify_use (basic_block bb, basic_block 
     }
 
   /* Make sure the use is in an appropriate list by checking the previous 
-     element to make sure its the same.  */
+     element to make sure it's the same.  */
   if (use_p->prev == NULL)
     {
       error ("No immediate_use list");
Index: tree-vrp.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-vrp.c,v
retrieving revision 2.1
diff -u -d -p -r2.1 tree-vrp.c
--- tree-vrp.c	9 Apr 2005 01:37:28 -0000	2.1
+++ tree-vrp.c	9 Apr 2005 16:39:15 -0000
@@ -2000,7 +2000,7 @@ vrp_meet (value_range *vr0, value_range 
 	  if (compare_values (vr0->min, vr1->min) == 1)
 	    min = vr1->min;
 
-	  /* The upper limit of the new range is the maximium of the
+	  /* The upper limit of the new range is the maximum of the
 	     two ranges.  */
 	  if (compare_values (vr0->max, vr1->max) == -1)
 	    max = vr1->max;
Index: varasm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/varasm.c,v
retrieving revision 1.493
diff -u -d -p -r1.493 varasm.c
--- varasm.c	1 Apr 2005 14:36:37 -0000	1.493
+++ varasm.c	9 Apr 2005 16:39:20 -0000
@@ -5402,7 +5402,7 @@ default_valid_pointer_mode (enum machine
 }
 
 /* Default function to output code that will globalize a label.  A
-   target must define GLOBAL_ASM_OP or provide it's own function to
+   target must define GLOBAL_ASM_OP or provide its own function to
    globalize a label.  */
 #ifdef GLOBAL_ASM_OP
 void
Index: config/alpha/alpha.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.c,v
retrieving revision 1.413
diff -u -d -p -r1.413 alpha.c
--- config/alpha/alpha.c	30 Mar 2005 18:53:11 -0000	1.413
+++ config/alpha/alpha.c	9 Apr 2005 16:39:29 -0000
@@ -8418,7 +8418,7 @@ alphaev4_next_group (rtx insn, int *pin_
 	  if (in_use)
 	    goto done;
 
-	  /* If this is a completely unrecognized insn, its an asm.
+	  /* If this is a completely unrecognized insn, it's an asm.
 	     We don't know how long it is, so record length as -1 to
 	     signal a needed realignment.  */
 	  if (recog_memoized (insn) < 0)
@@ -8516,7 +8516,7 @@ alphaev5_next_group (rtx insn, int *pin_
 	  if (in_use)
 	    goto done;
 
-	  /* If this is a completely unrecognized insn, its an asm.
+	  /* If this is a completely unrecognized insn, it's an asm.
 	     We don't know how long it is, so record length as -1 to
 	     signal a needed realignment.  */
 	  if (recog_memoized (insn) < 0)
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.439
diff -u -d -p -r1.439 arm.c
--- config/arm/arm.c	9 Apr 2005 12:03:51 -0000	1.439
+++ config/arm/arm.c	9 Apr 2005 16:39:41 -0000
@@ -7420,7 +7420,7 @@ arm_const_double_inline_cost (rtx val)
 			      NULL_RTX, NULL_RTX, 0, 0));
 }
 
-/* Return true if it is worthwile to split a 64-bit constant into two
+/* Return true if it is worthwhile to split a 64-bit constant into two
    32-bit operations.  This is the case if optimizing for size, or
    if we have load delay slots, or if one 32-bit part can be done with
    a single data operation.  */
Index: config/m32r/m32r.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.h,v
retrieving revision 1.127
diff -u -d -p -r1.127 m32r.h
--- config/m32r/m32r.h	29 Mar 2005 17:32:05 -0000	1.127
+++ config/m32r/m32r.h	9 Apr 2005 16:39:43 -0000
@@ -1609,7 +1609,7 @@ extern char m32r_punct_chars[256];
    After generation of rtl, the compiler makes no further distinction
    between pointers and any other objects of this machine mode.  */
 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
-   it's own problems (you have to add extendpsisi2 and truncsipsi2).
+   its own problems (you have to add extendpsisi2 and truncsipsi2).
    Try to avoid it.  */
 #define Pmode SImode
 
Index: config/rs6000/predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/predicates.md,v
retrieving revision 1.12
diff -u -d -p -r1.12 predicates.md
--- config/rs6000/predicates.md	9 Apr 2005 15:39:34 -0000	1.12
+++ config/rs6000/predicates.md	9 Apr 2005 16:39:44 -0000
@@ -339,7 +339,7 @@
 ;; Return 1 if the operand is in volatile memory.  Note that during the
 ;; RTL generation phase, memory_operand does not return TRUE for volatile
 ;; memory references.  So this function allows us to recognize volatile
-;; references where its safe.
+;; references where it's safe.
 (define_predicate "volatile_mem_operand"
   (and (and (match_code "mem")
 	    (match_test "MEM_VOLATILE_P (op)"))