[PATCH] Generic vectors 3/3

[Paolo Bonzini <paolo dot bonzini at lu dot unisi dot ch>]

This patch enables generic vectorization.  A new vector-lowering pass is 
scheduled after the vectorizer if the vectorizer has run and
vectorizable_operation is told not to do worthless generic 
vectorization: for example on 32-bit systems and 'short' values it is 
worthless to vectorize addition, but it is ok to vectorize bitwise 
operations.

The patch fixes vect-82.c and vect-83.c (vectorizing the initialization 
of an array of long longs).  They failed because the vectorizer didn't 
find a 128-bit vector mode for long longs, but now it finds TImode and 
uses it to produce vectorized code.

The patch does not fix vect-7.c on Alpha (which lacks addv8qi3), a 
follow-up patch will.  I also have a patch that prefers NOP_EXPR to 
VIEW_CONVERT_EXPR if possible in tree-complex.c; this will improve the 
generated code.

The patch also includes DejaGNU surgery so that the SIMD instructions 
are not enabled for all vect.exp tests.  What I did is looking for the 
vect_int, vect_float etc. dg-require-effective-target keywords; if one 
of them is found, either we enable the SIMD instructions, or we skip the 
test if they are not available.

I added several new tests that mimic those for hardware-supported 
vectorization.  Bootstrapped/regtested powerpc-apple-darwin7.8.0 with no 
regressions and with the new passes I mentioned.  Ok for mainline?

Paolo

2004-04-06  Paolo Bonzini  <bonzini@gnu.org>

	* tree-complex.c (gate_expand_vector_operations): New.
	(pass_lower_vector_ssa): Use it.
	* tree-optimize.c (init_tree_optimization_passes): Include
	pass_lower_vector_ssa.
	* tree-vect-transform.c (min_worthwhile_factor): New.
	(vectorizable_operation): Use it.
	* tree-vectorizer.c (get_vectype_for_scalar_type): Accept
	integer modes for the vector type.

testsuite:
2004-04-06  Paolo Bonzini  <bonzini@gnu.org>

	* gcc.dg/vect/gen-vect-11.c, gcc.dg/vect/gen-vect-11a.c,
	gcc.dg/vect/gen-vect-11b.c, gcc.dg/vect/gen-vect-11c.c,
	gcc.dg/vect/gen-vect-2.c, gcc.dg/vect/gen-vect-25.c,
	gcc.dg/vect/gen-vect-26.c, gcc.dg/vect/gen-vect-28.c,
	gcc.dg/vect/gen-vect-32.c: New.
	* gcc.dg/vect/tree-vect.h (quarter_word, half_word): New.
	* gcc.dg/vect/vect-82.c, gcc.dg/vect/vect-83.c: Fix dg-final.
	* gcc.dg/vect/vect-82_64.c, gcc.dg/vect/vect-83_64.c: Remove xfail,
	don't run on PPC32.
	* gcc.dg/vect/vect.exp: Rework so that per-target options for SIMD
	are not passed unless the test uses dg-require-effective-target.  Go
	through the testsuite even if there is no hardware SIMD support.

Index: tree-complex.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-complex.c,v
retrieving revision 2.20
diff -p -u -u -r2.20 tree-complex.c
--- tree-complex.c	5 Apr 2005 19:04:58 -0000	2.20
+++ tree-complex.c	6 Apr 2005 08:30:26 -0000
@@ -977,6 +977,14 @@ expand_vector_operations_1 (block_stmt_i
   mark_stmt_modified (bsi_stmt (*bsi));
 }
 
+/* Use this to lower vector operations introduced by the vectorizer,
+   if it may need the bit-twiddling tricks implemented in this file.  */
+static bool
+gate_expand_vector_operations (void)
+{
+  return flag_tree_vectorize != 0;
+}
+
 static void
 expand_vector_operations (void)
 {
@@ -1012,8 +1020,8 @@ tree_lower_operations (void)
 
 struct tree_opt_pass pass_lower_vector_ssa = 
 {
-  "vector",				/* name */
-  NULL,					/* gate */
+  "veclower",				/* name */
+  gate_expand_vector_operations,	/* gate */
   expand_vector_operations,		/* execute */
   NULL,					/* sub */
   NULL,					/* next */
Index: tree-optimize.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-optimize.c,v
retrieving revision 2.80
diff -p -u -u -r2.80 tree-optimize.c
--- tree-optimize.c	5 Apr 2005 19:05:02 -0000	2.80
+++ tree-optimize.c	6 Apr 2005 08:30:26 -0000
@@ -422,6 +422,7 @@ init_tree_optimization_passes (void)
   NEXT_PASS (pass_iv_canon);
   NEXT_PASS (pass_if_conversion);
   NEXT_PASS (pass_vectorize);
+  NEXT_PASS (pass_lower_vector_ssa);
   NEXT_PASS (pass_complete_unroll);
   NEXT_PASS (pass_iv_optimize);
   NEXT_PASS (pass_loop_done);
Index: tree-vect-transform.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-vect-transform.c,v
retrieving revision 2.9
diff -p -u -u -r2.9 tree-vect-transform.c
--- tree-vect-transform.c	29 Mar 2005 17:45:39 -0000	2.9
+++ tree-vect-transform.c	6 Apr 2005 08:30:28 -0000
@@ -711,6 +711,32 @@ vectorizable_assignment (tree stmt, bloc
 }
 
 
+/* Function min_worthwhile_factor.
+
+   For a loop where we could vectorize the operation indicated by CODE,
+   return the minimum vectorization factor that makes it worthwhile
+   to use generic vectors.  */
+static int
+min_worthwhile_factor (enum tree_code code)
+{
+  switch (code)
+    {
+    case PLUS_EXPR:
+    case MINUS_EXPR:
+    case NEGATE_EXPR:
+      return 4;
+
+    case BIT_AND_EXPR:
+    case BIT_IOR_EXPR:
+    case BIT_XOR_EXPR:
+    case BIT_NOT_EXPR:
+      return 2;
+
+    default:
+      return INT_MAX;
+    }
+}
+
 /* Function vectorizable_operation.
 
    Check if STMT performs a binary or unary operation that can be vectorized. 
@@ -768,6 +794,15 @@ vectorizable_operation (tree stmt, block
 	}	
     } 
 
+  /* Worthwhile without SIMD support?  */
+  if (!VECTOR_MODE_P (TYPE_MODE (vectype))
+      && LOOP_VINFO_VECT_FACTOR (loop_vinfo) < min_worthwhile_factor (code))
+    {
+      if (vect_print_dump_info (REPORT_DETAILS, UNKNOWN_LOC))
+	fprintf (vect_dump, "not worthwhile without SIMD support.");
+      return false;
+    }
+
   /* Supportable by target?  */
   if (!optab)
     {
Index: tree-vectorizer.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-vectorizer.c,v
retrieving revision 2.84
diff -p -u -u -r2.84 tree-vectorizer.c
--- tree-vectorizer.c	5 Apr 2005 19:05:16 -0000	2.84
+++ tree-vectorizer.c	6 Apr 2005 08:30:29 -0000
@@ -1642,11 +1639,9 @@ get_vectype_for_scalar_type (tree scalar
       print_generic_expr (vect_dump, vectype, TDF_SLIM);
     }
 
-  if (!VECTOR_MODE_P (TYPE_MODE (vectype)))
+  if (!VECTOR_MODE_P (TYPE_MODE (vectype))
+      && !INTEGRAL_MODE_P (TYPE_MODE (vectype)))
     {
-      /* TODO: tree-complex.c sometimes can parallelize operations
-         on generic vectors.  We can vectorize the loop in that case,
-         but then we should re-run the lowering pass.  */
       if (vect_print_dump_info (REPORT_DETAILS, UNKNOWN_LOC))
         fprintf (vect_dump, "mode not supported by target.");
       return NULL_TREE;
Index: testsuite/gcc.dg/vect/gen-vect-11.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-11.c
diff -N testsuite/gcc.dg/vect/gen-vect-11.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-11.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,31 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 16
+
+int main ()
+{
+  int i;
+  quarter_word ia[N];
+  quarter_word ic[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+  quarter_word ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+
+  for (i = 0; i < N; i++)
+    {
+      ia[i] = ib[i] + ic[i];
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ia[i] != ib[i] + ic[i])
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-11a.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-11a.c
diff -N testsuite/gcc.dg/vect/gen-vect-11a.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-11a.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,31 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 16
+
+int main ()
+{
+  int i;
+  half_word ia[N];
+  half_word ic[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+  half_word ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+
+  for (i = 0; i < N; i++)
+    {
+      ia[i] = ib[i] & ic[i];
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ia[i] != ib[i] + ic[i])
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-11b.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-11b.c
diff -N testsuite/gcc.dg/vect/gen-vect-11b.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-11b.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,32 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 16
+
+int main ()
+{
+  int i;
+  quarter_word ia[N];
+  quarter_word ic[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+  quarter_word ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+
+  /* Not vectorizable, multiplication */
+  for (i = 0; i < N; i++)
+    {
+      ia[i] = ib[i] * ic[i];
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ia[i] != ib[i] + ic[i])
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-11c.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-11c.c
diff -N testsuite/gcc.dg/vect/gen-vect-11c.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-11c.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,32 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 16
+
+int main ()
+{
+  int i;
+  half_word ia[N];
+  half_word ic[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+  half_word ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+
+  /* Not worthwhile, only 2 parts per int */
+  for (i = 0; i < N; i++)
+    {
+      ia[i] = ib[i] + ic[i];
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ia[i] != ib[i] + ic[i])
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-2.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-2.c
diff -N testsuite/gcc.dg/vect/gen-vect-2.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-2.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,30 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 16
+ 
+int main ()
+{
+  half_word cb[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+  half_word ca[N];
+  int i;
+
+  for (i = 0; i < N; i++)
+    {
+      ca[i] = cb[i];
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ca[i] != cb[i])
+        abort ();
+    }
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+/*  dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-25.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-25.c
diff -N testsuite/gcc.dg/vect/gen-vect-25.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-25.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,45 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 128
+
+int main (int n, int *p)
+{
+  int i;
+  half_word ib[N];
+  half_word ia[N];
+  int k;
+
+  for (i = 0; i < N; i++)
+    {
+      ia[i] = n;
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ia[i] != n)
+        abort ();
+    }
+
+  k = *p;
+  for (i = 0; i < N; i++)
+    {
+      ib[i] = k;
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ib[i] != k)
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-26.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-26.c
diff -N testsuite/gcc.dg/vect/gen-vect-26.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-26.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,33 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 128
+
+/* unaligned store.  */
+
+int main ()
+{
+  int i;
+  quarter_word ia[N+1];
+
+  for (i = 1; i <= N; i++)
+    {
+      ia[i] = 5;
+    }
+
+  /* check results:  */
+  for (i = 1; i <= N; i++)
+    {
+      if (ia[i] != 5)
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-28.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-28.c
diff -N testsuite/gcc.dg/vect/gen-vect-28.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-28.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,34 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 128
+#define OFF 3
+
+/* unaligned store.  */
+
+int main (int off)
+{
+  int i;
+  quarter_word ia[N+OFF];
+
+  for (i = 0; i < N; i++)
+    {
+      ia[i+off] = 5;
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (ia[i+off] != 5)
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/gen-vect-32.c
===================================================================
RCS file: testsuite/gcc.dg/vect/gen-vect-32.c
diff -N testsuite/gcc.dg/vect/gen-vect-32.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/gcc.dg/vect/gen-vect-32.c	6 Apr 2005 08:30:33 -0000
@@ -0,0 +1,32 @@
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 16
+ 
+int main ()
+{  
+  struct {
+    quarter_word ca[N];
+  } s;
+  int i;
+
+  for (i = 0; i < N; i++)
+    {
+      s.ca[i] = 5;
+    }
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (s.ca[i] != 5)
+        abort ();
+    }
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/tree-vect.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/vect/tree-vect.h,v
retrieving revision 1.3
diff -p -u -u -r1.3 tree-vect.h
--- testsuite/gcc.dg/vect/tree-vect.h	15 Nov 2004 22:04:38 -0000	1.3
+++ testsuite/gcc.dg/vect/tree-vect.h	6 Apr 2005 08:30:33 -0000
@@ -24,3 +24,11 @@ void check_vect (void)
 #endif
   signal (SIGILL, SIG_DFL);
 }
+
+#if __LONG_MAX__ == 2147483647L
+typedef char quarter_word;
+typedef short half_word;
+#else
+typedef short quarter_word;
+typedef int half_word;
+#endif
Index: testsuite/gcc.dg/vect/vect-82.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/vect/vect-82.c,v
retrieving revision 1.3
diff -p -u -u -r1.3 vect-82.c
--- testsuite/gcc.dg/vect/vect-82.c	31 Mar 2005 18:34:19 -0000	1.3
+++ testsuite/gcc.dg/vect/vect-82.c	6 Apr 2005 08:30:33 -0000
@@ -32,5 +32,5 @@ int main (void)
   return main1 ();
 } 
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/vect-82_64.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/vect/vect-82_64.c,v
retrieving revision 1.3
diff -p -u -u -r1.3 vect-82_64.c
--- testsuite/gcc.dg/vect/vect-82_64.c	31 Mar 2005 18:34:19 -0000	1.3
+++ testsuite/gcc.dg/vect/vect-82_64.c	6 Apr 2005 08:30:34 -0000
@@ -1,4 +1,5 @@
 /* { dg-do run { target powerpc*-*-* } } */
+/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
 /* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-stats -maltivec" } */
 
 #include <stdarg.h>
@@ -33,5 +34,5 @@ int main (void)
   return main1 ();
 } 
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/vect-83.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/vect/vect-83.c,v
retrieving revision 1.3
diff -p -u -u -r1.3 vect-83.c
--- testsuite/gcc.dg/vect/vect-83.c	31 Mar 2005 18:34:19 -0000	1.3
+++ testsuite/gcc.dg/vect/vect-83.c	6 Apr 2005 08:30:34 -0000
@@ -32,5 +32,5 @@ int main (void)
   return main1 ();
 } 
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/vect-83_64.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/vect/vect-83_64.c,v
retrieving revision 1.3
diff -p -u -u -r1.3 vect-83_64.c
--- testsuite/gcc.dg/vect/vect-83_64.c	31 Mar 2005 18:34:19 -0000	1.3
+++ testsuite/gcc.dg/vect/vect-83_64.c	6 Apr 2005 08:30:34 -0000
@@ -1,4 +1,5 @@
 /* { dg-do run { target powerpc*-*-* } } */
+/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
 /* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-stats -maltivec" } */
 
 #include <stdarg.h>
@@ -33,5 +34,5 @@ int main (void)
   return main1 ();
 } 
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
Index: testsuite/gcc.dg/vect/vect.exp
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/vect/vect.exp,v
retrieving revision 1.10
diff -p -u -u -r1.10 vect.exp
--- testsuite/gcc.dg/vect/vect.exp	7 Feb 2005 10:07:07 -0000	1.10
+++ testsuite/gcc.dg/vect/vect.exp	6 Apr 2005 13:11:25 -0000
@@ -21,55 +21,107 @@ load_lib gcc-dg.exp
 
 # Set up flags used for tests that don't specify options.
 set DEFAULT_VECTCFLAGS ""
+set TARGET_VECTCFLAGS ""
 
 # These flags are used for all targets.
 lappend DEFAULT_VECTCFLAGS "-O2" "-ftree-vectorize" \
   "-ftree-vectorizer-verbose=3" "-fdump-tree-vect-stats"
 
-# If the target system supports vector instructions, the default action
-# for a test is 'run', otherwise it's 'compile'.  Save current default.
-# Executing vector instructions on a system without hardware vector support
-# is also disabled by a call to check_vect, but disabling execution here is
-# more efficient.
-global dg-do-what-default
-set save-dg-do-what-default ${dg-do-what-default}
-
-# Skip these tests for targets that do not support generating vector
-# code.  Set additional target-dependent vector flags, which can be
-# overridden by using dg-options in individual tests.
+# Set additional target-dependent vector flags, which can be overridden
+# by using dg-options in individual tests.  Also, if the target system
+# supports vector instructions, the default action for tests requiring
+# vect_* is 'run', otherwise it's 'compile'.
 if [istarget "powerpc*-*-*"] {
     # If there are powerpc targets to skip, do it here.
 
-    lappend DEFAULT_VECTCFLAGS "-maltivec"
+    lappend TARGET_VECTCFLAGS "-maltivec"
     if [check_vmx_hw_available] {
-	set dg-do-what-default run
+ 	set target-dg-do-what-default run
     } else {
 	if [is-effective-target ilp32] {
 	    # Specify a cpu that supports VMX for compile-only tests.
-	    lappend DEFAULT_VECTCFLAGS "-mcpu=7400"
+	    lappend TARGET_VECTCFLAGS "-mcpu=7400"
 	}
-	set dg-do-what-default compile
+	set target-dg-do-what-default compile
     }
 } elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } {
-    lappend DEFAULT_VECTCFLAGS "-msse2"
-    set dg-do-what-default run
+    lappend TARGET_VECTCFLAGS "-msse2"
+    set target-dg-do-what-default run
 } elseif [istarget "mipsisa64*-*-*"] {
-    lappend DEFAULT_VECTCFLAGS "-mpaired-single"
-    set dg-do-what-default run
+    lappend TARGET_VECTCFLAGS "-mpaired-single"
+    set target-dg-do-what-default run
 } elseif [istarget "sparc*-*-*"] {
-    lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
-    set dg-do-what-default run
+    lappend TARGET_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
+    set target-dg-do-what-default run
 } elseif [istarget "alpha*-*-*"] {
-    lappend DEFAULT_VECTCFLAGS "-mmax"
+    lappend TARGET_VECTCFLAGS "-mmax"
     if [check_alpha_max_hw_available] {
-	set dg-do-what-default run
+	set target-dg-do-what-default run
     } else {
-	set dg-do-what-default compile
+ 	set target-dg-do-what-default compile
     }
 } elseif [istarget "ia64-*-*"] {
-    set dg-do-what-default run
+    set target-dg-do-what-default run
 } else {
-    return
+    # Skip these tests for targets that do not support generating vector
+    # code.  Executing vector instructions on a system without hardware
+    # vector support is also disabled by a call to check_vect, but disabling
+    # execution here is more efficient.
+    set target-dg-do-what-default skip
+}
+
+set target-default-extra-flags [ concat $TARGET_VECTCFLAGS $DEFAULT_VECTCFLAGS ]
+
+rename check_effective_target_vect_int save-check_effective_target_vect_int
+proc check_effective_target_vect_int { } {
+    return [expr [check_effective_target_simd_hw] \
+                  && [save-check_effective_target_vect_int]]
+}
+
+rename check_effective_target_vect_shift save-check_effective_target_vect_shift
+proc check_effective_target_vect_shift { } {
+    return [expr [check_effective_target_simd_hw] \
+                  && [save-check_effective_target_vect_shift]]
+}
+
+rename check_effective_target_vect_long save-check_effective_target_vect_long
+proc check_effective_target_vect_long { } {
+    upvar dg-extra-tool-flags dg-extra-tool-flags
+    return [expr [check_effective_target_simd_hw] \
+                  && [save-check_effective_target_vect_long]]
+}
+
+rename check_effective_target_vect_float save-check_effective_target_vect_float
+proc check_effective_target_vect_float { } {
+    return [expr [check_effective_target_simd_hw] \
+                  && [save-check_effective_target_vect_float]]
+}
+
+rename check_effective_target_vect_double save-check_effective_target_vect_double
+proc check_effective_target_vect_double { } {
+    return [expr [check_effective_target_simd_hw] \
+                  && [save-check_effective_target_vect_double]]
+}
+
+proc check_effective_target_simd_hw { } {
+    global target-dg-do-what-default target-default-extra-flags
+    upvar #3 dg-do-what dg-do-what
+    upvar #3 dg-extra-tool-flags dg-extra-tool-flags
+
+    if [string equal ${target-dg-do-what-default} skip] {
+        return 0
+    }
+
+    # Check if we can only compile
+    if [string equal ${target-dg-do-what-default} compile] {
+	if [string equal [lindex dg-do-what 1] run] {
+            set dg-do-what [list compile \
+			         [lindex dg-do-what 2] [lindex dg-do-what 3]]
+	}
+    }
+
+    set dg-extra-tool-flags ${target-default-extra-flags}
+    return 1
 }
 
 # Initialize `dg'.
@@ -77,10 +129,7 @@ dg-init
 
 # Main loop.
 dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]]  \
-	"" $DEFAULT_VECTCFLAGS
-
-# Clean up.
-set dg-do-what-default ${save-dg-do-what-default}
+	   "" $DEFAULT_VECTCFLAGS
 
 # All done.
 dg-finish