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[RFC] .debug_frame adjustments for mips-irix
Eric Christopher wrote:
> Please do.
>
> thanks.
The first issue was .debug_frame sections not emitted without -g for
mips-sgi-irix6.5 configured with --with-gnu-as, despite those bits in
iris6.h:
/* Force the generation of dwarf .debug_frame sections even if not
compiling -g. This guarantees that we can unwind the stack. */
#define DWARF2_FRAME_INFO !TARGET_SGI_O32_AS
and what the documentation says about this macro.
We reach dwar2fout_frame_finish thanks to DWARF2_UNWIND_INFO defined and
dwarf2out_do_frame returning 1, but frame_finish, unlike do_frame, has no
check to honor the DWARF2_FRAME_INFO setting above.
The first patch below (GCC 3.4 context) addresses that by adding to
frame_finish the same check already in do_frame.
--
The second issue is a bit more involved. GCC currently uses the hard return
reg column (31) as the dwarf return address column. This badly confuses
the system unwinder on IRIX (experimented a couple of days ago after
adjusting the CIE data alignment factor, suggested by looking at the SGI's
compiler output, confirmed by a member of the SGI team and by experiments
with different approaches to use a virtual column number in GCC).
The second patch below (also GCC 3.4 based), addresses that by overriding
DWARF_FRAME_RETURN_COLUMN on IRIX and by adjusting 'mips_frame_set' to note
an additional dwarf ra column change when r31 is saved and the dwarf ra
column number differs.
--
As previously mentioned, both patches have been locally tested in various
ways, although not yet using the full GCC testuite due to lack of CPU
resources up to now.
Thanks in advance for your feedback,
Olivier
------------------------------------------------------------------------------
2005-03-15 Olivier Hainque <hainque@adacore.com>
* dwarf2out.c (dwarf2out_frame_finish): Honor DWARF2_FRAME_INFO
defined and non-zero.
*** gcc/dwarf2out.c.ori Wed Mar 9 03:54:06 2005
--- gcc/dwarf2out.c Wed Mar 9 04:07:36 2005
*************** void
*** 2308,2314 ****
dwarf2out_frame_finish (void)
{
/* Output call frame information. */
! if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
output_call_frame_info (0);
if (! USING_SJLJ_EXCEPTIONS && (flag_unwind_tables || flag_exceptions))
--- 2308,2319 ----
dwarf2out_frame_finish (void)
{
/* Output call frame information. */
! if (write_symbols == DWARF2_DEBUG
! || write_symbols == VMS_AND_DWARF2_DEBUG
! #ifdef DWARF2_FRAME_INFO
! || DWARF2_FRAME_INFO
! #endif
! )
output_call_frame_info (0);
if (! USING_SJLJ_EXCEPTIONS && (flag_unwind_tables || flag_exceptions))
------------------------------------------------------------------------------
2005-03-15 Olivier Hainque <hainque@adacore.com>
* config/mips/iris6.h (DWARF_FRAME_RETURN_COLUMN): Redefine to
match what the system unwinder expects.
* config/mips/mips.c (mips_frame_set): If we're saving the return
address register and the dwarf return address column number differs
from the hard register number, note the dwarf return address save
too.
*** gcc/config/mips/iris6.h.ori Tue Mar 15 06:39:49 2005
--- gcc/config/mips/iris6.h Tue Mar 15 08:30:43 2005
*************** Boston, MA 02111-1307, USA. */
*** 165,170 ****
--- 165,175 ----
compiling -g. This guarantees that we can unwind the stack. */
#define DWARF2_FRAME_INFO !TARGET_SGI_O32_AS
+ /* The system unwinder in libexc requires a specific dwarf return address
+ column to work. */
+ #undef DWARF_FRAME_RETURN_COLUMN
+ #define DWARF_FRAME_RETURN_COLUMN (FP_REG_LAST + 1)
+
/* The size in bytes of a DWARF field indicating an offset or length
relative to a debug info section, specified to be 4 bytes in the DWARF-2
specification. The SGI/MIPS ABI defines it to be the same as PTR_SIZE. */
*** gcc/config/mips/mips.c.ori Tue Mar 15 06:16:18 2005
--- gcc/config/mips/mips.c Tue Mar 15 04:51:53 2005
*************** mips_frame_set (rtx mem, rtx reg)
*** 6785,6790 ****
--- 6785,6806 ----
{
rtx set = gen_rtx_SET (VOIDmode, mem, reg);
RTX_FRAME_RELATED_P (set) = 1;
+
+ /* If we're saving the return address register and the dwarf return
+ address column number differs from the hard register number, note
+ the dwarf return address save too. */
+ if (REGNO (reg) == GP_REG_FIRST + 31
+ && DWARF_FRAME_RETURN_COLUMN != GP_REG_FIRST + 31)
+ {
+ rtx ra_column_set
+ = gen_rtx_SET (VOIDmode,
+ mem,
+ gen_rtx_REG (word_mode, DWARF_FRAME_RETURN_COLUMN));
+ RTX_FRAME_RELATED_P (ra_column_set) = 1;
+
+ set = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, ra_column_set));
+ }
+
return set;
}