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Committed, cris.md: Mark multiply operands as commutative


If you search for commutative, the first google bit has a
visualizing example using multiplication. :-)

This has a small positive effect that's likely drowned in noise
in the typical case; I see 0.001%(!) .. 1.5% faster code and a
code size reduction of 0.03% .. 0.17% with -O2.  So, it's mostly
but not only an annoyance item.  Built and regtested cris-axis-elf.

Index: ChangeLog
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog,v
retrieving revision 2.7578
retrieving revision 2.7579
diff -c -p -r2.7578 -r2.7579
*** ChangeLog	24 Feb 2005 14:17:25 -0000	2.7578
--- ChangeLog	24 Feb 2005 16:59:06 -0000	2.7579
***************
*** 1,3 ****
--- 1,9 ----
+ 2005-02-24  Hans-Peter Nilsson  <hp@axis.com>
+ 
+ 	* config/cris/cris.md ("umulhisi3", "umulqihi3", "mulsi3")
+ 	("mulqihi3", "mulhisi3", "mulsidi3", "umulsidi3"): Mark input
+ 	operands as commutative in constraints.
+ 
  2005-02-24  Diego Novillo  <dnovillo@redhat.com>
  
  	* tree-into-ssa.c: Re-organize internal functions.
Index: config/cris/cris.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.md,v
retrieving revision 1.21
diff -c -p -u -p -r1.21 cris.md
cvs diff: conflicting specifications of output style
--- config/cris/cris.md	13 Oct 2004 23:35:03 -0000	1.21
+++ config/cris/cris.md	24 Feb 2005 16:52:05 -0000
@@ -2470,7 +2470,7 @@
 (define_insn "umulhisi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(mult:SI
-	 (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
+	 (zero_extend:SI (match_operand:HI 1 "register_operand" "%0"))
 	 (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!mulu.w %2,%0"
@@ -2484,7 +2484,7 @@
 (define_insn "umulqihi3"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(mult:HI
-	 (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
+	 (zero_extend:HI (match_operand:QI 1 "register_operand" "%0"))
 	 (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!mulu.b %2,%0"
@@ -2503,7 +2503,7 @@
 
 (define_insn "mulsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
-	(mult:SI (match_operand:SI 1 "register_operand" "0")
+	(mult:SI (match_operand:SI 1 "register_operand" "%0")
 		 (match_operand:SI 2 "register_operand" "r")))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.d %2,%0"
@@ -2521,7 +2521,7 @@
 (define_insn "mulqihi3"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(mult:HI
-	 (sign_extend:HI (match_operand:QI 1 "register_operand" "0"))
+	 (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
 	 (sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.b %2,%0"
@@ -2534,7 +2534,7 @@
 (define_insn "mulhisi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(mult:SI
-	 (sign_extend:SI (match_operand:HI 1 "register_operand" "0"))
+	 (sign_extend:SI (match_operand:HI 1 "register_operand" "%0"))
 	 (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.w %2,%0"
@@ -2554,7 +2554,7 @@
 (define_insn "mulsidi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(mult:DI
-	 (sign_extend:DI (match_operand:SI 1 "register_operand" "0"))
+	 (sign_extend:DI (match_operand:SI 1 "register_operand" "%0"))
 	 (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.d %2,%M0\;move $mof,%H0")
@@ -2562,7 +2562,7 @@
 (define_insn "umulsidi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(mult:DI
-	 (zero_extend:DI (match_operand:SI 1 "register_operand" "0"))
+	 (zero_extend:DI (match_operand:SI 1 "register_operand" "%0"))
 	 (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!mulu.d %2,%M0\;move $mof,%H0")



brgds, H-P


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