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Re: [PATCH] operands_match_p for multiple hard registers

On Thu, 2005-02-24 at 15:47, Richard Earnshaw wrote:
> On Thu, 2005-02-24 at 15:40, David Edelsohn wrote:

> > "Each long double is made up of two IEEE doubles.  The value of the
> > long double is the sum of the values of the two parts (except for
> > -0.0).  The most significant part is required to be the value of the
> > long double rounded to the nearest double, as specified by IEEE."
> > 
> > 	Truncating from TFmode to DFmode can be accomplished by narrowing
> > the value to the most significant IEEE double.  The register number in the
> > insn refers to the most significant register in the pair, so if the
> > register allocator assigns the same register to the source and
> > destination, the value can be truncated without a no-op FP move
> > instruction. 
> OK.  And the 'word' ordering of this is such that the 'Most-Significant
> Double' (MSD) value is in the lower-numbered register -- a sort of
> 'little-endian'.  If the MSD were in the higher-numbered register, then
> my guess is that this would just have worked as expected :-)

Duh!  It's not 'little-endian'.  The odd thing here is that truncation
is being done by discarding the least significant bits.  Unlike integer
modes where truncation discards the MSB.

My brain is addled today.  So I'll shut up now.


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