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Re: [PATCH] operands_match_p for multiple hard registers
- From: Richard Earnshaw <rearnsha at gcc dot gnu dot org>
- To: Richard Henderson <rth at redhat dot com>
- Cc: David Edelsohn <dje at watson dot ibm dot com>, gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 24 Feb 2005 15:59:57 +0000
- Subject: Re: [PATCH] operands_match_p for multiple hard registers
- Organization: GNU
- References: <200502240136.j1O1asD30288@makai.watson.ibm.com> <20050224093226.GB11556@redhat.com>
On Thu, 2005-02-24 at 09:32, Richard Henderson wrote:
> On Wed, Feb 23, 2005 at 08:36:54PM -0500, David Edelsohn wrote:
> > This behavior only seems to make sense for scalar integers...
> I don't agree. It could easily make sense for fp single to fp double
> extension. Would you like to describe the actual problem?
Thinking about this, I suspect it's a classic 'mixed-endian' type
problem. Not everything is 'big-endian' or 'little-endian'. Sometimes
things are a mixture of both.
In this particular case it seems that we need a new macro that replaces
the use of WORDS_BIG_ENDIAN that takes the CLASS into account.
Where a subword defines the amount that fits into a single register of
CLASS when holding values of mode MODE.
A default definition would probably be something like
GET_MODE_CLASS (MODE) == CLASS_FLOAT \
? FLOAT_WORDS_BIG_ENDIAN : WORDS_BIG_ENDIAN
But machines could vary that as required.