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libffi: adjust intarg_count for 64-bit integer types in PPC32
- From: Andrew Haley <aph at redhat dot com>
- To: java-patches at gcc dot gnu dot org, gcc-patches at gcc dot gnu dot org
- Date: Tue, 22 Feb 2005 18:56:14 +0000
- Subject: libffi: adjust intarg_count for 64-bit integer types in PPC32
64-bit arguments are passed as two words, but either both words must
fit in registers or both go on the stack. If they go on the stack,
they must be 8-byte-aligned.
Also, only certain register pairs can be used for passing long long
int -- specifically (r3,r4), (r5,r6), (r7,r8), (r9,r10).
We weren't adjusting the register count to allow for the latter, and
as a result inbound registers were uninitialized.
This is PR 20104.
Andrew.
2005-02-22 Andrew Haley <aph@redhat.com>
* src/powerpc/ffi.c (ffi_prep_cif_machdep): Bump alignment to
odd-numbered register pairs for 64-bit integer types.
Index: src/powerpc/ffi.c
===================================================================
RCS file: /cvs/gcc/gcc/libffi/src/powerpc/ffi.c,v
retrieving revision 1.11
diff -p -u -r1.11 ffi.c
--- src/powerpc/ffi.c 2 Sep 2004 21:07:21 -0000 1.11
+++ src/powerpc/ffi.c 22 Feb 2005 18:45:24 -0000
@@ -573,10 +573,14 @@ ffi_status ffi_prep_cif_machdep(ffi_cif
/* 'long long' arguments are passed as two words, but
either both words must fit in registers or both go
on the stack. If they go on the stack, they must
- be 8-byte-aligned. */
+ be 8-byte-aligned.
+
+ Also, only certain register pairs can be used for
+ passing long long int -- specifically (r3,r4), (r5,r6),
+ (r7,r8), (r9,r10).
+ */
if (intarg_count == NUM_GPR_ARG_REGISTERS-1
- || (intarg_count >= NUM_GPR_ARG_REGISTERS
- && intarg_count%2 != 0))
+ || intarg_count%2 != 0)
intarg_count++;
intarg_count += 2;
break;