This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[RFC] PowerPC long double PR target/19019


	This patch provides a version of cmptf compatible with XLC
semantics.  If this is the direction we follow, we probably should change
TARGET_XL_CALL to TARGET_XL_COMPAT and we would need to add that flag to
Darwin options.

David


	PR target/19019
	* config/rs6000/rs6000.md (cmptf_internal1): Add !TARGET_XL_CALL
	test.
	(cmptf_internal2): New.
	* config/rs6000/rs6000.c (rs6000_generate_compare): Generate
	PARALLEL for compare if TFmode and XL compatibility enabled.

Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.346
diff -c -p -r1.346 rs6000.md
*** rs6000.md	1 Feb 2005 20:57:09 -0000	1.346
--- rs6000.md	11 Feb 2005 23:42:28 -0000
***************
*** 11364,11374 ****
    [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
  	(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "f")
  		      (match_operand:TF 2 "gpc_reg_operand" "f")))]
!   "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
     && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
    "fcmpu %0,%1,%2\;bne %0,$+8\;fcmpu %0,%L1,%L2"
    [(set_attr "type" "fpcompare")
     (set_attr "length" "12")])
  
  ;; Now we have the scc insns.  We can do some combinations because of the
  ;; way the machine works.
--- 11364,11433 ----
    [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
  	(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "f")
  		      (match_operand:TF 2 "gpc_reg_operand" "f")))]
!   "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && !TARGET_XL_CALL
     && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
    "fcmpu %0,%1,%2\;bne %0,$+8\;fcmpu %0,%L1,%L2"
    [(set_attr "type" "fpcompare")
     (set_attr "length" "12")])
+ 
+ (define_insn_and_split "*cmptf_internal2"
+   [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
+ 	(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "f")
+ 		      (match_operand:TF 2 "gpc_reg_operand" "f")))
+     (clobber (match_scratch:DF 3 "=f"))
+     (clobber (match_scratch:DF 4 "=f"))
+     (clobber (match_scratch:DF 5 "=f"))
+     (clobber (match_scratch:DF 6 "=f"))
+     (clobber (match_scratch:DF 7 "=f"))
+     (clobber (match_scratch:DF 8 "=f"))
+     (clobber (match_scratch:DF 9 "=f"))
+     (clobber (match_scratch:DF 10 "=f"))]
+   "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && TARGET_XL_CALL
+    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 3) (match_dup 13))
+    (set (match_dup 4) (match_dup 14))
+    (set (match_dup 9) (abs:DF (match_dup 5)))
+    (set (match_dup 0) (compare:CCFP (match_dup 9) (match_dup 3)))
+    (set (pc) (if_then_else (ne (match_dup 0) (const_int 0))
+ 			   (label_ref (match_dup 11))
+ 			   (pc)))
+    (set (match_dup 0) (compare:CCFP (match_dup 5) (match_dup 7)))
+    (set (pc) (label_ref (match_dup 12)))
+    (match_dup 11)
+    (set (match_dup 10) (minus:DF (match_dup 5) (match_dup 7)))
+    (set (match_dup 9) (minus:DF (match_dup 6) (match_dup 8)))
+    (set (match_dup 9) (plus:DF (match_dup 10) (match_dup 9)))
+    (set (match_dup 0) (compare:CCFP (match_dup 7) (match_dup 4)))
+    (match_dup 12)]
+ {
+   REAL_VALUE_TYPE rv;
+   const int lo_word = FLOAT_WORDS_BIG_ENDIAN ? GET_MODE_SIZE (DFmode) : 0;
+   const int hi_word = FLOAT_WORDS_BIG_ENDIAN ? 0 : GET_MODE_SIZE (DFmode);
+ 
+   operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, hi_word);
+   operands[6] = simplify_gen_subreg (DFmode, operands[1], TFmode, lo_word);
+   operands[7] = simplify_gen_subreg (DFmode, operands[2], TFmode, hi_word);
+   operands[8] = simplify_gen_subreg (DFmode, operands[2], TFmode, lo_word);
+   operands[11] = gen_label_rtx ();
+   operands[12] = gen_label_rtx ();
+   real_inf (&rv);
+   operands[13] = force_const_mem (DFmode,
+ 				  CONST_DOUBLE_FROM_REAL_VALUE (rv, DFmode));
+   operands[14] = force_const_mem (DFmode,
+ 				  CONST_DOUBLE_FROM_REAL_VALUE (dconst0,
+ 								DFmode));
+   if (TARGET_TOC)
+     {
+       operands[13] = gen_const_mem (DFmode,
+ 				    create_TOC_reference (XEXP (operands[13], 0)));
+       operands[14] = gen_const_mem (DFmode,
+ 				    create_TOC_reference (XEXP (operands[14], 0)));
+       set_mem_alias_set (operands[13], get_TOC_alias_set ());
+       set_mem_alias_set (operands[14], get_TOC_alias_set ());
+     }
+ })
  
  ;; Now we have the scc insns.  We can do some combinations because of the
  ;; way the machine works.
Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.784
diff -c -p -r1.784 rs6000.c
*** rs6000.c	3 Feb 2005 06:36:02 -0000	1.784
--- rs6000.c	11 Feb 2005 23:42:28 -0000
*************** rs6000_generate_compare (enum rtx_code c
*** 11458,11467 ****
        emit_insn (cmp);
      }
    else
!     emit_insn (gen_rtx_SET (VOIDmode, compare_result,
! 			    gen_rtx_COMPARE (comp_mode,
! 					     rs6000_compare_op0,
! 					     rs6000_compare_op1)));
  
    /* Some kinds of FP comparisons need an OR operation;
       under flag_unsafe_math_optimizations we don't bother.  */
--- 11458,11489 ----
        emit_insn (cmp);
      }
    else
!     {
!       if (TARGET_XL_CALL && comp_mode == CCFPmode
! 	  && GET_MODE (rs6000_compare_op0) == TFmode
! 	  && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
! 	  && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128)
! 	emit_insn (gen_rtx_PARALLEL (VOIDmode,
! 	  gen_rtvec (9,
! 		     gen_rtx_SET (VOIDmode,
! 				  compare_result,
! 				  gen_rtx_COMPARE (comp_mode,
! 						   rs6000_compare_op0,
! 						   rs6000_compare_op1)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)),
! 		     gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)))));
!       else
! 	emit_insn (gen_rtx_SET (VOIDmode, compare_result,
! 				gen_rtx_COMPARE (comp_mode,
! 						 rs6000_compare_op0,
! 						 rs6000_compare_op1)));
!     }
  
    /* Some kinds of FP comparisons need an OR operation;
       under flag_unsafe_math_optimizations we don't bother.  */


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]