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RFA: Mark DIVS and DIVU SH2A instructions as unusable in delayslots
- From: Nick Clifton <nickc at redhat dot com>
- To: joern dot rennecke at st dot com, aoliva at redhat dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Mon, 10 Jan 2005 14:47:17 +0000
- Subject: RFA: Mark DIVS and DIVU SH2A instructions as unusable in delayslots
Hi Joern, Hi Alex,
A customer of ours recently reported a problem with the SH2A port
uncovered by the PlumHall testsuite. Obviously I cannot reproduce
that test here, but I was able to find the problem and a simple
patch to fix it.
The problem is that the SH2A's "divs" and "divu" instructions should
not be placed into the delay slot of a branch/jump instruction
because they might cause an exception. This is caught by the
simulator which was how the problem was uncovered. The patch below
fixes this problem by setting the "in_delay_slot" slot attribute for
the relevant patterns to "no".
May I apply this patch please ? Tested with no regressions on an
sh-elf port with the -m2a switch enabled during gcc testing.
Cheers
Nick
gcc/ChangeLog
2005-01-10 Nick Clifton <nickc@redhat.com>
* config/sh/sh.md (udivsi3_sh2a, divsi3_sh2a): Give these patterns
an "in_delay_slot" attribute of "no" to prevent them being used in
delay slots. This is forbidden because they might generate
exceptions.
Index: gcc/config/sh/sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.188
diff -c -3 -p -r1.188 sh.md
*** gcc/config/sh/sh.md 2 Dec 2004 17:03:08 -0000 1.188
--- gcc/config/sh/sh.md 10 Jan 2005 14:36:20 -0000
***************
*** 1164,1170 ****
(match_operand:SI 2 "arith_reg_operand" "z")))]
"TARGET_SH2A"
"divu %2,%1"
! [(set_attr "type" "arith")])
;; We must use a pseudo-reg forced to reg 0 in the SET_DEST rather than
;; hard register 0. If we used hard register 0, then the next instruction
--- 1164,1171 ----
(match_operand:SI 2 "arith_reg_operand" "z")))]
"TARGET_SH2A"
"divu %2,%1"
! [(set_attr "type" "arith")
! (set_attr "in_delay_slot" "no")])
;; We must use a pseudo-reg forced to reg 0 in the SET_DEST rather than
;; hard register 0. If we used hard register 0, then the next instruction
***************
*** 1348,1354 ****
(match_operand:SI 2 "arith_reg_operand" "z")))]
"TARGET_SH2A"
"divs %2,%1"
! [(set_attr "type" "arith")])
(define_insn "divsi3_i1"
[(set (match_operand:SI 0 "register_operand" "=z")
--- 1349,1356 ----
(match_operand:SI 2 "arith_reg_operand" "z")))]
"TARGET_SH2A"
"divs %2,%1"
! [(set_attr "type" "arith")
! (set_attr "in_delay_slot" "no")])
(define_insn "divsi3_i1"
[(set (match_operand:SI 0 "register_operand" "=z")