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Re: [RFA:] Fix PR target/18701, address adjustment error withparadoxical mem subregs. (Disallow them, I say!)

Hi H-P,

I'm sure you realize that paradoxical subregs of MEMs have special
semantics on hosts that define LOAD_EXTEND_OP?  On targets, such as
MMIX, the upper bits of the paradoxical subreg of a MEM are not
undefined but are either zero or sign extended (for MMIX depending
upon the -mzero-extend command line option).

This is particularly significant as GCC's MMIX backend is one of the
few targets doesn't define explicit sign or zero extension patterns.
Indeed, config/mmix/ doesn't even contain the string sign_extend
or zero_extend, instead forcing the middle-end to synthesise these
widening operations.

Given these constraints (no sign_extend or zero_extend RTL support but
a defined LOAD_EXTEND_OP) its perhaps not surprising that the middle-end
and RTL optimizers make use of paradoxical MEM subregs at almost every
"load" opportunity, to eliminate the left-shift/right-shift sequence
that would otherwise be necessary for integer widening operations.

Perhaps "disallow them I say!" is a bit strong, but most targets are
able to minimize or eliminate the use of paradoxical subregs of MEMs
by adding  suitable sign and/or zero extension variants of thier load
instructions or valid addressing modes :>

On Tue, 21 Dec 2004, Hans-Peter Nilsson wrote:
> Second, admittedly a bit simplistic, but seems valid looking at the other
> things disallowed in that context:
> 	PR target/18701
> 	* combine.c (combine_simplify_rtx): Do not allow paradoxical
> 	subregs of MEM.

Having said all that, I completely agree with your second patch that
combine shouldn't be widening the mode used to access MEMs.  This is
OK for mainline, however I think something more descriptive/accurate
for the ChangeLog is on order.  Perhaps...

	PR target/18701
	* combine (combine_simplify_rtx): Do not widen the mode used
	to access the MEM of a paradoxical subreg.

Is this patch sufficient to resolve PR18701 on its own?



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