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make -mno-sse and -mno-mmx functional


This is in sprit follow-on to pr 19102 for mainline.  This is a quick
way to be certain that sse and mmx code is not generated when it's
not desired, like for kernel code.


r~


        * config/i386/i386.c (override_options): Respect user disable of
        fancy 387 math, sse, mmx.
        (construct_container): Generate error if we need an sse regster
        and sse has been disabled.
        * config/i386/i386.h (TARGET_SWITCHES): Disabling sse also disables
        later sse generations.  Disabling mmx also disables 3dnow.

Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.760
diff -c -p -d -r1.760 i386.c
*** config/i386/i386.c	21 Dec 2004 16:46:02 -0000	1.760
--- config/i386/i386.c	23 Dec 2004 03:40:37 -0000
*************** override_options (void)
*** 1473,1479 ****
  
    /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
       since the insns won't need emulation.  */
!   if (x86_arch_always_fancy_math_387 & (1 << ix86_arch))
      target_flags &= ~MASK_NO_FANCY_MATH_387;
  
    /* Likewise, if the target doesn't have a 387, or we've specified
--- 1473,1480 ----
  
    /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
       since the insns won't need emulation.  */
!   if (!(target_flags_explicit & MASK_NO_FANCY_MATH_387)
!       && (x86_arch_always_fancy_math_387 & (1 << ix86_arch)))
      target_flags &= ~MASK_NO_FANCY_MATH_387;
  
    /* Likewise, if the target doesn't have a 387, or we've specified
*************** override_options (void)
*** 1489,1503 ****
    if (TARGET_SSE2)
      target_flags |= MASK_SSE;
  
    if (TARGET_64BIT)
      {
        if (TARGET_ALIGN_DOUBLE)
  	error ("-malign-double makes no sense in the 64bit mode");
        if (TARGET_RTD)
  	error ("-mrtd calling convention not supported in the 64bit mode");
!       /* Enable by default the SSE and MMX builtins.  */
!       target_flags |= (MASK_SSE2 | MASK_SSE | MASK_MMX | MASK_128BIT_LONG_DOUBLE);
!       ix86_fpmath = FPMATH_SSE;
       }
    else
      {
--- 1490,1522 ----
    if (TARGET_SSE2)
      target_flags |= MASK_SSE;
  
+   /* Turn on MMX builtins for -msse.  */
+   if (TARGET_SSE)
+     {
+       target_flags |= MASK_MMX & ~target_flags_explicit;
+       x86_prefetch_sse = true;
+     }
+ 
+   /* Turn on MMX builtins for 3Dnow.  */
+   if (TARGET_3DNOW)
+     target_flags |= MASK_MMX;
+ 
    if (TARGET_64BIT)
      {
        if (TARGET_ALIGN_DOUBLE)
  	error ("-malign-double makes no sense in the 64bit mode");
        if (TARGET_RTD)
  	error ("-mrtd calling convention not supported in the 64bit mode");
! 
!       /* Enable by default the SSE and MMX builtins.  Do allow the user to
! 	 explicitly disable any of these.  In particular, disabling SSE and
! 	 MMX for kernel code is extremely useful.  */
!       target_flags
! 	|= ((MASK_SSE2 | MASK_SSE | MASK_MMX | MASK_128BIT_LONG_DOUBLE)
! 	    & ~target_flags_explicit);
! 
!       if (TARGET_SSE)
! 	ix86_fpmath = FPMATH_SSE;
       }
    else
      {
*************** override_options (void)
*** 1546,1568 ****
    if (! (ix86_fpmath & FPMATH_387))
      target_flags |= MASK_NO_FANCY_MATH_387;
  
-   /* It makes no sense to ask for just SSE builtins, so MMX is also turned
-      on by -msse.  */
-   if (TARGET_SSE)
-     {
-       target_flags |= MASK_MMX;
-       x86_prefetch_sse = true;
-     }
- 
-   /* If it has 3DNow! it also has MMX so MMX is also turned on by -m3dnow */
-   if (TARGET_3DNOW)
-     {
-       target_flags |= MASK_MMX;
-       /* If we are targeting the Athlon architecture, enable the 3Dnow/MMX
- 	 extensions it adds.  */
-       if (x86_3dnow_a & (1 << ix86_arch))
- 	target_flags |= MASK_3DNOW_A;
-     }
    if ((x86_accumulate_outgoing_args & TUNEMASK)
        && !(target_flags_explicit & MASK_ACCUMULATE_OUTGOING_ARGS)
        && !optimize_size)
--- 1565,1570 ----
*************** override_options (void)
*** 1576,1583 ****
      internal_label_prefix_len = p - internal_label_prefix;
      *p = '\0';
    }
!   /* When scheduling description is not available, disable scheduler pass so it
!      won't slow down the compilation and make x87 code slower.  */
    if (!TARGET_SCHEDULE)
      flag_schedule_insns_after_reload = flag_schedule_insns = 0;
  }
--- 1578,1586 ----
      internal_label_prefix_len = p - internal_label_prefix;
      *p = '\0';
    }
! 
!   /* When scheduling description is not available, disable scheduler pass
!      so it won't slow down the compilation and make x87 code slower.  */
    if (!TARGET_SCHEDULE)
      flag_schedule_insns_after_reload = flag_schedule_insns = 0;
  }
*************** construct_container (enum machine_mode m
*** 2543,2548 ****
--- 2546,2567 ----
    if (needed_intregs > nintregs || needed_sseregs > nsseregs)
      return NULL;
  
+   /* We allowed the user to turn off SSE for kernel mode.  Don't crash if
+      some less clueful developer tries to use floating-point anyway.  */
+   if (needed_sseregs && !TARGET_SSE)
+     {
+       static bool issued_error;
+       if (!issued_error)
+ 	{
+ 	  issued_error = true;
+ 	  if (in_return)
+ 	    error ("SSE register return with SSE disabled");
+ 	  else
+ 	    error ("SSE register argument with SSE disabled");
+ 	}
+       return NULL;
+     }
+ 
    /* First construct simple cases.  Avoid SCmode, since we want to use
       single register to pass this type.  */
    if (n == 1 && mode != SCmode)
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.412
diff -c -p -d -r1.412 i386.h
*** config/i386/i386.h	21 Dec 2004 16:46:04 -0000	1.412
--- config/i386/i386.h	23 Dec 2004 03:40:38 -0000
*************** extern int x86_prefetch_sse;
*** 393,411 ****
      N_("Do not use push instructions to save outgoing arguments") },	      \
    { "mmx",			 MASK_MMX,				      \
      N_("Support MMX built-in functions") },				      \
!   { "no-mmx",			 -MASK_MMX,				      \
      N_("Do not support MMX built-in functions") },			      \
    { "3dnow",                     MASK_3DNOW,				      \
      N_("Support 3DNow! built-in functions") },				      \
!   { "no-3dnow",                  -MASK_3DNOW,				      \
      N_("Do not support 3DNow! built-in functions") },			      \
    { "sse",			 MASK_SSE,				      \
      N_("Support MMX and SSE built-in functions and code generation") },	      \
!   { "no-sse",			 -MASK_SSE,				      \
      N_("Do not support MMX and SSE built-in functions and code generation") },\
    { "sse2",			 MASK_SSE2,				      \
      N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
!   { "no-sse2",			 -MASK_SSE2,				      \
      N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
    { "sse3",			 MASK_SSE3,				      \
      N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
--- 393,411 ----
      N_("Do not use push instructions to save outgoing arguments") },	      \
    { "mmx",			 MASK_MMX,				      \
      N_("Support MMX built-in functions") },				      \
!   { "no-mmx",			 -(MASK_MMX|MASK_3DNOW|MASK_3DNOW_A),	      \
      N_("Do not support MMX built-in functions") },			      \
    { "3dnow",                     MASK_3DNOW,				      \
      N_("Support 3DNow! built-in functions") },				      \
!   { "no-3dnow",                  -(MASK_3DNOW|MASK_3DNOW_A),		      \
      N_("Do not support 3DNow! built-in functions") },			      \
    { "sse",			 MASK_SSE,				      \
      N_("Support MMX and SSE built-in functions and code generation") },	      \
!   { "no-sse",			 -(MASK_SSE|MASK_SSE2|MASK_SSE3),	      \
      N_("Do not support MMX and SSE built-in functions and code generation") },\
    { "sse2",			 MASK_SSE2,				      \
      N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
!   { "no-sse2",			 -(MASK_SSE2|MASK_SSE3),		      \
      N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
    { "sse3",			 MASK_SSE3,				      \
      N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
Index: testsuite/gcc.target/i386/amd64-abi-1.c
===================================================================
RCS file: testsuite/gcc.target/i386/amd64-abi-1.c
diff -N testsuite/gcc.target/i386/amd64-abi-1.c
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- testsuite/gcc.target/i386/amd64-abi-1.c	23 Dec 2004 03:40:38 -0000
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile { target x86_64-*-* } } */
+ /* { dg-options "-mno-sse" } */
+ 
+ double foo(void) { return 0; }	/* { dg-error "SSE disabled" } */
+ void bar(double x) { }
Index: testsuite/gcc.target/i386/defines-1.c
===================================================================
RCS file: testsuite/gcc.target/i386/defines-1.c
diff -N testsuite/gcc.target/i386/defines-1.c
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- testsuite/gcc.target/i386/defines-1.c	23 Dec 2004 03:40:38 -0000
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=nocona -mno-sse" } */
+ 
+ #if defined(__SSE__) || defined(__SSE2__) || defined(__SSE3__)
+ #error
+ #endif
Index: testsuite/gcc.target/i386/defines-2.c
===================================================================
RCS file: testsuite/gcc.target/i386/defines-2.c
diff -N testsuite/gcc.target/i386/defines-2.c
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- testsuite/gcc.target/i386/defines-2.c	23 Dec 2004 03:40:38 -0000
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=athlon64 -mno-mmx" } */
+ 
+ #if defined(__MMX__) || defined(__3dNOW__) || defined(__3dNOW_A__)
+ #error
+ #endif


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