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Re: [PATCH] Fix PR middle-end/18776


> > The first modification is to use a subreg in write_complex_part and
> > read_complex_part if the original object is a hard reg that spans an even
> > number of registers.
>
> This might be ok, I guess.

Thanks.

> I'm not sure why REGMODE_NATURAL_SIZE has anything to do with anything
> here. If store_bit_field is given an aligned mem, does it not already
> result in a single store to an adjusted memory?  It certainly should...

The problem is that both store_bit_field and extract_bit_field want to operate 
on integral modes

  /* Make sure we are playing with integral modes.  Pun with subregs
     if we aren't.  This must come after the entire register case above,
     since that case is valid for any mode.  The following cases are only
     valid for integral modes.  */
  {
    enum machine_mode imode = int_mode_for_mode (GET_MODE (op0));
    if (imode != GET_MODE (op0))
      {
	if (MEM_P (op0))
	  op0 = adjust_address (op0, imode, 0);
	else
	  {
	    gcc_assert (imode != BLKmode);
	    op0 = gen_lowpart (imode, op0);
	  }
      }
  }

So we're already making unnecessary subregs from SF to SI and then SI to SF.
Then get_best_mode returns DImode instead of SImode for the field because, on 
SLOW_BYTE_ACCESS platforms, it returns the largest, not the smallest, 
suitable mode.  So we're operating in DImode for the extraction.

We really need to avoid all this business on SPARC 64-bit for SCmode values.

-- 
Eric Botcazou


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