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Re: [PATCH] Test arm_tune_xscale, not arm_arch_xscale


Richard Earnshaw <rearnsha@gcc.gnu.org> writes:

> The original change was done in the days before combine took into
> account the cost of a combined insn relative to it's non-combined cost. 
> This should now be done by changing the rtx costs for XScale rather than
> hacking the patterns.

This certainly makes sense.  Unfortunately, this turns out to require
a change to combine.c.  combine.c does not consider the costs if it
had to modify another instruction.  In this case, it did have to
modify one: the conditional branch instruction which uses the result
of the compare.

This patch works for my simple test case.  I'll start testing it
shortly.  Let me know if it looks bogus.

Ian


2004-12-14  Ian Lance Taylor  <ian@wasabisystems.com>

	* combine.c (combine_validate_cost): Consider cost of
	undobuf.other_insn rather than always allowing the recombination
	if it is set.
	* config/arm/arm.c (arm_xscale_rtx_costs): Increase cost of
	COMPARE of MULT.
	* config/arm/arm.md (mulsi3_compare0): Don't check
	arm_arch_xscale.
	(mulsi_compare0_scratch, mulsi3_addsi_compare0): Likewise.
	(mulsi3addsi_compare0_scratch): Likewise.


Index: combine.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/combine.c,v
retrieving revision 1.462
diff -p -u -r1.462 combine.c
--- combine.c	27 Nov 2004 09:38:55 -0000	1.462
+++ combine.c	14 Dec 2004 15:00:32 -0000
@@ -560,10 +560,23 @@ combine_validate_cost (rtx i1, rtx i2, r
       new_i2_cost = 0;
     }
 
+  if (undobuf.other_insn)
+    {
+      int old_other_cost, new_other_cost;
+
+      old_other_cost = (INSN_UID (undobuf.other_insn) <= last_insn_cost
+			? uid_insn_cost[INSN_UID (undobuf.other_insn)] : 0);
+      new_other_cost = insn_rtx_cost (PATTERN (undobuf.other_insn));
+      if (old_other_cost > 0 && new_other_cost > 0)
+	{
+	  old_cost += old_other_cost;
+	  new_cost += new_other_cost;
+	}
+    }
+
   /* Disallow this recombination if both new_cost and old_cost are
      greater than zero, and new_cost is greater than old cost.  */
-  if (!undobuf.other_insn
-      && old_cost > 0
+  if (old_cost > 0
       && new_cost > old_cost)
     {
       if (dump_file)
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.422
diff -p -u -r1.422 arm.c
--- config/arm/arm.c	20 Nov 2004 12:48:15 -0000	1.422
+++ config/arm/arm.c	14 Dec 2004 15:00:33 -0000
@@ -4398,6 +4398,15 @@ arm_xscale_rtx_costs (rtx x, int code, i
 		 + (REG_OR_SUBREG_REG (XEXP (x, 1)) ? 0 : 4);
       return true;
 
+    case COMPARE:
+      /* A COMPARE of a MULT is slow on XScale; the muls instruction
+	 will stall until the multiplication is complete.  */
+      if (GET_CODE (XEXP (x, 0)) == MULT)
+	*total = 4 + rtx_cost (XEXP (x, 0), code);
+      else
+	*total = arm_rtx_costs_1 (x, code, outer_code);
+      return true;
+
     default:
       *total = arm_rtx_costs_1 (x, code, outer_code);
       return true;
Index: config/arm/arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.187
diff -p -u -r1.187 arm.md
--- config/arm/arm.md	20 Nov 2004 11:21:55 -0000	1.187
+++ config/arm/arm.md	14 Dec 2004 15:00:35 -0000
@@ -1097,7 +1097,7 @@
 			 (const_int 0)))
    (set (match_operand:SI 0 "s_register_operand" "=&r,&r")
 	(mult:SI (match_dup 2) (match_dup 1)))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mul%?s\\t%0, %2, %1"
   [(set_attr "conds" "set")
    (set_attr "insn" "muls")]
@@ -1110,7 +1110,7 @@
 			  (match_operand:SI 1 "s_register_operand" "%?r,0"))
 			 (const_int 0)))
    (clobber (match_scratch:SI 0 "=&r,&r"))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mul%?s\\t%0, %2, %1"
   [(set_attr "conds" "set")
    (set_attr "insn" "muls")]
@@ -1141,7 +1141,7 @@
    (set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r,&r")
 	(plus:SI (mult:SI (match_dup 2) (match_dup 1))
 		 (match_dup 3)))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mla%?s\\t%0, %2, %1, %3"
   [(set_attr "conds" "set")
    (set_attr "insn" "mlas")]
@@ -1156,7 +1156,7 @@
 		  (match_operand:SI 3 "s_register_operand" "?r,r,0,0"))
 	 (const_int 0)))
    (clobber (match_scratch:SI 0 "=&r,&r,&r,&r"))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mla%?s\\t%0, %2, %1, %3"
   [(set_attr "conds" "set")
    (set_attr "insn" "mlas")]


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