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Re: store_bit_field, CONCATs and subregs

Richard Henderson <> writes:
> On Thu, Dec 09, 2004 at 07:29:02PM +0000, Richard Sandiford wrote:
>> A couple of week ago, I noticed that tests like:
>>     struct s { _Complex short cs __attribute__((packed)); };
>>     void f (struct s *s) { s->cs = 1 + 2i; }
>> could fail due to alignment problems.  The value we're storing into
>> s->cs is a CHImode constant pool reference:
>>     (mem/i:CHI (lo_sum:SI (reg:SI 182)
>>                           (symbol_ref/f:SI ("*$LC0")
>>         [flags 0x2] <complex_cst 0x401aab70>)) [0 S4 A16])
>> and the lowpart generated by the current store_bit_field code is:
>>     (mem/i:SI (lo_sum:SI (reg:SI 182)
>>                          (symbol_ref/f:SI ("*$LC0")
>>         [flags 0x2] <complex_cst 0x401aab70>)) [0 S4 A16])
>> Both MEMs say that the reference only has 16-bit alignment, but it's
>> unusual (maybe even wrong?) to have unaligned SImode MEMs on a
>> strict-alignment target.
> Indeed, this is wrong.  If we can still generate it after my changes
> to emit_move_insn, we should fix it.

Well, it still failed today before my patch, but mu patch avoids
this instance of it.

I don't understand how emit_move_insn comes into it though.  Like I say,
the SImode MEM was created by the old gen_lowpart call in store_bit_field.
It sounds like you're saying that that MEM is indeed invalid, and given
that gen_lowpart_general always returns non-NULL, I assumed that meant
store_bit_field was wrong to ask for the lowpart in the first place.
Is that right?  Or are you saying that something else besides
store_bit_field should also be changed?

>> 	* expmed.c (store_bit_field): Create a temporary when changing the
>> 	value to an integer mode.
> Ok.

Thanks, applied.


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